xcf32pvo48m Xilinx Corp., xcf32pvo48m Datasheet - Page 16

• Manufacturer Part Number: xcf32pvo48m
• Description: < B L Qpro Extended Temperature Platform Flash In-system Programmable Configuration Prom
• Manufacturer: Xilinx Corp.

DS541 (v1.0) November 27, 2006
Product Specification
TMS
TDO
TCK
TDI
V
CCJ
R
V
CCO
V
Notes:
1 For Mode pin connections and DONE pin pull-up value, refer to the appropriate FPGA data sheet.
2 For compatible voltages, refer to the appropriate data sheet.
3 CS_B (or CS) and RDWR_B (or WRITE) must be either driven Low or pulled down externally. One option is shown.
4 The BUSY pin is only available with the XQF32P Platform Flash PROM, and the connection is only required for
5 In Slave SelectMAP mode, the configuration interface can be clocked by an external oscillator, or, optionally, the
6 For the XQF32P the CF pin is a bidirectional pin, and if CF is not connected to PROGB, then must be tied to V
CCINT
high-frequency SelectMAP mode configuration. For BUSY pin requirements, refer to the appropriate FPGA data sheet.
CLKOUT signal can be used to drive the FPGA's configuration clock (CCLK). If the XQF32P PROM's CLKOUT signal
is used, then CLKOUT must be tied to a 4.7 KΩ resistor pulled up to V
a 4.7 kΩ pull-up resistor.
V
V
V
TDI
TMS
TCK
GND
QPro Extended Temperature Platform Flash In-System Programmable Configuration PROM
CCINT
CCO
CCJ
XQF32P
Platform Flash
PROM
(2)
(2)
External
Oscillator
OE/RESET
(5)
BUSY
CLK
Figure 9: Configuring in Slave SelectMAP Mode
D[0:7]
CF
CEO
TDO
CE
(5)
(6)
(4)
V
CCO
(2)
www.xilinx.com
(1)
D[0:7]
CCLK
DONE
INIT_B
PROG_B
BUSY
TDI
TMS
TCK
GND
Xilinx FPGA
Slave SelectMAP
CCO
(4)
.
MODE PINS
RDWR_B
CS_B
TDO
(1)
CCO
via
1KΩ
PROG_B
BUSY
1KΩ
INIT_B
DONE
D[0:7]
CCLK
(4)
I/O
I/O
...OPTIONAL
Slave FPGAs
with identical
configurations
(3)
(3)
ds541_09_080406
16