lm5000sdx-6 National Semiconductor Corporation, lm5000sdx-6 Datasheet - Page 11

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lm5000sdx-6

Manufacturer Part Number
lm5000sdx-6
Description
High Voltage Switch Mode Regulator
Manufacturer
National Semiconductor Corporation
Datasheet
Figure 4 (a)). If the slope of the inductor current is too great,
the circuit will be unstable above duty cycles of 50%.
The LM5000 provides a compensation pin (COMP) to cus-
tomize the voltage loop feedback. It is recommended that a
series combination of R
tion network, as shown in Figure 1. The series combination of
R
ing equations:
where R
850kΩ. For most applications, performance can be optimized
by choosing values within the range 5kΩ
680pF
COMPENSATION
This section will present a general design procedure to help
insure a stable and operational circuit. The designs in this
datasheet are optimized for particular requirements. If differ-
ent conversions are required, some of the components may
need to be changed to ensure stability. Below is a set of gen-
eral guidelines in designing a stable circuit for continuous
conduction operation (loads greater than 100mA), in most all
cases this will provide for stability during discontinuous oper-
ation as well. The power components and their effects will be
determined first, then the compensation components will be
chosen to produce stability.
INDUCTOR SELECTION
To ensure stability at duty cycles above 50%, the inductor
must have some minimum value determined by the minimum
input voltage and the maximum output voltage. This equation
is:
where fs is the switching frequency, D is the duty cycle, and
R
tion is only good for duty cycles greater than 50% (D>0.5).
The inductor ripple current is important for a few reasons. One
reason is because the peak switch current will be the average
inductor current (input current) plus Δi
to make sure that the switch will not reach its current limit
during normal operation. The inductor must also be sized ac-
cordingly. It should have a saturation current rating higher
than the peak inductor current expected. The output voltage
ripple is also affected by the total ripple current.
DC GAIN AND OPEN-LOOP GAIN
Since the control stage of the converter forms a complete
feedback loop with the power components, it forms a closed-
C
DSON
and C
is the ON resistance of the internal switch. This equa-
O
C
C
C
introduces pole-zero pair according to the follow-
is the output impedance of the error amplifier,
4.7nF.
C
and C
C
be used for the compensa-
L
. Care must be taken
R
C
20kΩ and
11
loop system that must be stabilized to avoid positive feedback
and instability. A value for open-loop DC gain will be required,
from which you can calculate, or place, poles and zeros to
determine the crossover frequency and the phase margin. A
high phase margin (greater than 45°) is desired for the best
stability and transient response. For the purpose of stabilizing
the LM5000, choosing a crossover point well below where the
right half plane zero is located will ensure sufficient phase
margin. A discussion of the right half plane zero and checking
the crossover using the DC gain will follow.
OUTPUT CAPACITOR SELECTION
The choice of output capacitors is somewhat more arbitrary.
It is recommended that low ESR (Equivalent Series Resis-
tance, denoted R
polymer electrolytic, or low ESR tantalum. Higher ESR ca-
pacitors may be used but will require more compensation
which will be explained later on in the section. The ESR is also
important because it determines the output voltage ripple ac-
cording to the approximate equation:
After choosing the output capacitor you can determine a pole-
zero pair introduced into the control loop by the following
equations:
Where R
the maximum load current. The zero created by the ESR of
the output capacitor is generally very high frequency if the
ESR is small. If low ESR capacitors are used it can be ne-
glected. If higher ESR capacitors are used see the High
Output Capacitor ESR Compensation section.
RIGHT HALF PLANE ZERO
A current mode control boost regulator has an inherent right
half plane zero (RHP zero). This zero has the effect of a zero
in the gain plot, causing an imposed +20dB/decade on the
rolloff, but has the effect of a pole in the phase, subtracting
another 90° in the phase plot. This can cause undesirable
effects if the control loop is influenced by this zero. To ensure
the RHP zero does not cause instability issues, the control
loop should be designed to have a bandwidth of ½ the fre-
quency of the RHP zero or less. This zero occurs at a fre-
quency of:
where I
SELECTING THE COMPENSATION COMPONENTS
The first step in selecting the compensation components R
and C
loop. Simply choose values for R
given in the Introduction to Compensation section to set this
pole in the area of 10Hz to 100Hz. The frequency of the pole
created is determined by the equation:
C
LOAD
is to set a dominant low frequency pole in the control
L
is the minimum load resistance corresponding to
is the maximum load current.
ΔV
ESR
OUT
) capacitors be used such as ceramic,
2Δi
L
R
ESR
C
and C
(in Volts)
C
within the ranges
www.national.com
C

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