lm5037mtx National Semiconductor Corporation, lm5037mtx Datasheet - Page 9

• Manufacturer Part Number: lm5037mtx
• Description: Dual-mode Pwm Controller With Alternating Outputs
• Manufacturer: National Semiconductor Corporation

Functional Description
The LM5037 PWM controller contains all the features neces-
sary to implement double-ended power converter topologies
such as push-pull, half-bridge and full-bridge. The unique ar-
chitecture allows the modulator to be configured for either
voltage-mode or current-mode control. The LM5037 provides
two alternative gate driver outputs to drive the primary side
power MOSFETs with programmable forced dead-time. The
LM5037 can be configured to operate with bias voltages rang-
ing from 13V to 100V. Additional features include line under-
voltage lockout, cycle-by-cycle current limit, voltage feed-
forward compensation, and hiccup mode fault protection with
adjustable delays, soft-start, and a 2MHz capable oscillator
with synchronization capability, precision reference and ther-
mal shutdown. These rich set of features simplify the design
of double ended topologies. The functional block diagram is
shown in Figure 1.
HIGH-VOLTAGE START-UP REGULATOR
The LM5037 contains an internal high voltage, start-up regu-
lator that allows the input pin (VIN) to be connected directly
to the supply voltage over a range of 13V to a maximum of
100V. The regulator input can withstand transients up to
105V. The regulator output at VCC (7.7V) is internally current
limited with a guaranteed minimum of 45 mA. When the UVLO
pin potential is greater than 0.45V, the VCC regulator is en-
abled to charge an external capacitor connected to the VCC
pin. The VCC regulator provides power to the voltage refer-
ence (REF) and the gate drivers (OUTA and OUTB). When
the voltage on the VCC pin exceeds its Under-Voltage (VCC
UV) threshold, the internal voltage reference (REF) reaches
its regulation set point of 5V and the UVLO voltage is greater
than 1.25V, the controller outputs are enabled. The value se-
lected for the VCC capacitor depends on the total system
design, and its start-up characteristics. The recommended
range of values for the VCC capacitor is 0.47 µF to 10 µF.The
internal power dissipation of the LM5037 can be reduced by
powering VCC from an external supply. In typical applica-
tions, an auxiliary transformer winding is connected through
a diode to the VCC pin. This winding must raise the VCC volt-
age above 8.1V to shut off the internal start-up regulator.
Powering VCC from an auxiliary winding improves efficiency
while reducing the controller’s power dissipation. The VCC
UV circuit will still function in this mode, requiring that VCC
never falls below its nominal threshold during the start-up se-
quence. The VCC regulator series pass transistor includes a
diode between VCC and VIN that should not be forward bi-
ased in normal operation. Therefore the auxiliary VCC voltage
should never exceed the VIN voltage.
An external DC bias voltage can be used instead of the inter-
nal regulator by connecting the external bias voltage to both
the VCC and the VIN pins. In this particular case, the external
bias must be greater than max VCC regulation of 8V and less
than the VCC maximum operating voltage rating (15V).
LINE UNDER-VOLTAGE DETECTOR
The LM5037 contains a dual level line Under-Voltage Lock
Out (UVLO) circuit. When the UVLO pin voltage is below
0.45V, the controller is in a low current shutdown mode. When
the UVLO pin voltage is greater than 0.45V but less than
1.25V, the controller is in standby mode. In standby mode the
VCC and REF bias regulators are active while the controller
outputs are disabled. When the VCC and REF outputs exceed
their respective under-voltage thresholds and the UVLO pin
voltage is greater than 1.25V, the outputs are enabled and
normal operation begins. An external set-point voltage divider
9
from VIN to GND can be used to set the minimum operating
voltage of the converter. The divider must be designed such
that the voltage at the UVLO pin will be greater than 1.25V
when VIN enters the desired operating range. UVLO hystere-
sis is accomplished with an internal 22 µA current source that
is switched on or off into the impedance of the set-point di-
vider. When the UVLO pin voltage exceeds 1.25V threshold,
the current source is activated to quickly raise the voltage at
the UVLO pin. When the UVLO pin voltage falls below the
1.25V threshold, the current source is disabled causing the
voltage at the UVLO pin to quickly fall. The hysteresis of the
0.45V shutdown comparator is internally fixed at 100 mV.
The UVLO pin can also be used to implement various remote
enable/disable functions. Turning off the converter by forcing
the UVLO pin to standby condition provides a controlled soft-
stop. See the Soft-Start section for more details.
REFERENCE
The REF pin is the output of a 5V linear regulator that can be
used to bias an opto-coupler transistor and external house-
keeping circuits. The regulator output is internally current
limited to 10 mA (typical).
ERROR AMPLIFIER
An internal high gain error amplifier is provided within the
LM5037. The amplifier’s non-inverting reference is tied to a
1.25V reference. In non-isolated applications the power con-
verter output is connected to the FB pin via the voltage setting
resistors and loop compensation is connected between the
COMP and FB pins. A typical gain/phase plot is shown in
performance curves section.
For most isolated applications the error amplifier function is
implemented on the secondary side. Since the internal error
amplifier is configured as an open drain output, it can be dis-
abled by connecting FB to ground. The internal 5K pull-up
resistor connected between the COMP pin and the 5V refer-
ence can be used as the pull-up for an opto-coupler or other
isolation device .
CYCLE-BY-CYCLE CURRENT LIMIT
The CS pin is to be driven by a signal representative of the
transformer primary current. The current sense signal can be
generated by using a sense resistor or a current sense trans-
former. If the voltage sensed at the CS pin exceeds 0.25V,
the current sense comparator terminates the output driver
pulse. If the high current condition persists, the controller op-
erates in a cycle-by-cycle current limit mode with duty cycle
determined by the current sense comparator instead of the
PWM comparator. Cycle-by-cycle current limiting may even-
tually trigger the hiccup mode restart cycle; depending on the
configuration of the RES pin (see Overload Protection Timer
below). To suppress noise, a small R-C filter connected to the
CS pin and located near the controller is recommended. An
internal 21Ω MOSFET discharges the external current sense
filter capacitor at the conclusion of every cycle. The discharge
MOSFET remains on for an additional 65 ns after either OUTA
or OUTB driver switches high to blank leading edge transients
in the current sensing circuit. Discharging the CS pin filter
each cycle and blanking leading edge spikes reduces the fil-
tering requirements and improves the current sense response
time. The current sense comparator is very fast and may re-
spond to short duration noise pulses. Layout considerations
are critical for the current sense filter and sense resistor. The
capacitor associated with the CS filter must be placed very
close to the device and connected directly to the CS and AG-
ND pins. If a sense resistor located in the source of the main
MOSFET switch is used for current sensing, a low inductance
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