a8439eej-t Allegro MicroSystems, Inc., a8439eej-t Datasheet - Page 12

• Manufacturer Part Number: a8439eej-t
• Description: A8439 Photoflash Capacitor Charger With Igbt Driver And Refresh
• Manufacturer: Allegro MicroSystems, Inc.

A8439
Transformer Design
Turns Ratio.
(Secondary:Primary) should be chosen based on the following
formula:
where:
For example, if V
be the case when two high voltage diodes were in series), and the
desired V
In a worst case, when V
at their maximum tolerance limit, N will be higher. Taking V
= 5.5 V, V
the worst case condition, N can be determined to be 9.5.
In practice, always choose a turns ratio that is higher than the
calculated value to give some safety margin. In the worst case
example, a minimum turns ratio of N = 10 is recommended.
Primary Inductance
Figure 8. Typical circuit for photoflash capacitor charging application.
V
BIAS
V
V
V
40 (V) is the rated voltage for the internal MOSFET switch,
representing the maximum allowable reflected voltage from the
output to the SW pin.
OUT
D_Drop
BATT
3.0 to 5.5 V
R4
100 k
(V) is the required output voltage level,
(V) is the transformer battery supply, and
OUT
R5
10 k
R6
10 k
D_Drop
(V) is the forward voltage drop of the output diode(s),
The minimum transformer turns ratio, N,
is 320 V, then the turns ratio should be at least 8.9.
CHARGE
DONE
TRIGGER
VIN
= 2 V, and V
BATT
N
. As a loose guideline when choosing the
C1
0.1 μF
GND
is 3.5 V and V
BATT
V
IGBTDRV
Two Alkaline/NiMH/NiCAD or one Li +
V
A8439
OUT
BATT
40
is highest and V
OUT
SW
1.5 to 5.5 V
FB
Photoflash Capacitor Charger with IGBT Driver and Refresh
C2
4.7 μF
V
V
= 320 V × 102 % = 326.4 V as
To IGBT Gate
BATT
D _ Drop
D_Drop
1:10.2
T1
D1
is 1.7 V (which could
D_Drop
4.99 M
4.99 M
39 k
R1
R2
R3
Applications Information
and V
C3
1 nF
V
COUT
100 μF
330 V
OUT
OUT
(1)
BATT
are
primary inductance, L
Ideally, the charging time is not affected by transformer primary
inductance. In practice, however, it is recommended that a
primary inductance be chosen between 10 μH and 20 μH. When
L
frequency, which increases switching loss proportionally. This
leads to lower efficiency and longer charging time. When
L
be dramatically increased to handle the required power density,
and the series resistances are usually higher. A design that is
optimized to achieve a small footprint solution would have an
L
secondary capacitance, and minimized primary and secondary
series resistance. Please refer to the table Recommended
Components for more information.
Leakage Inductance and Secondary Capacitance.
former design should minimize the leakage inductance to ensure
the turn-off voltage spike at the SW node does not exceed the
40 V limit. An achievable minimum leakage inductance for this
application, however, is usually compromised by an increase in
parasitic capacitance. Furthermore, the transformer secondary
capacitance should be minimized. Any secondary capacitance is
multiplied by N
initial current swings when the switch turns on, and to reduced
efficiency.
Primary
Primary
Primary
is lower than 10 μH, the converter operates at higher
is greater than 20 μH, the rating of the transformer must
of 12 to 14 μH, with minimized leakage inductance and
Symbol
R1, R2
R5, R6
C1
C2
C3
D1
T1
R3
R4
L
2
Primary
when reflected to the primary, leading to high
0.1 μF, X5R or X7R, 10 V
4.7 μF, X5R or X7R, 10 V
1 nF, X5R or X7R, 10 V
Fairchild Semiconductor BAV23S
(dual diode connected in series)
Tokyo Coil Engineering T-16-024A,
L
1206 resistors, 1 %
0603 resistor, 1 %
Pull-up resistor
Pull-down resistors
Primary
Primary
300
= 12 μH, N = 10.2
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com
N
(μH), use the following formula:
10
I
SWLIM
9
Rating
V
OUT
.
The trans-
(2)
12