a8439eej-t Allegro MicroSystems, Inc., a8439eej-t Datasheet - Page 13

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a8439eej-t

Manufacturer Part Number
a8439eej-t
Description
A8439 Photoflash Capacitor Charger With Igbt Driver And Refresh
Manufacturer
Allegro MicroSystems, Inc.
Datasheet
A8439
Adjusting Output Voltage
The A8439 senses output voltage continuously in order to provide
auto-refresh function. The output voltage can be adjusted by
selecting proper values of the voltage divider resistors. Use the
following equation to calculate values for Rx (Ω):
least 300 V. A typical 1206 surface mount resistor has a 150 V
breakdown voltage rating. It is recommended that R1 and R2
have similar values to ensure an even voltage stress between
them. Recommended values are:
which together yield a stop voltage of 305 V.
Output Diode Selection
Choose the rectifying diode(s), D1, to have small parasitic
capacitance (short reverse recovery time) while satisfying the
reverse voltage and forward current requirements.
The peak reverse voltage of the diode, V
internal MOSFET switch is closed, and the primary-side current
starts to ramp-up. It can be calculated as:
Recommended Components Table
C1, Input Capacitor
C2, Input Capacitor
COUT, Photoflash Capacitor 330 V 100 μF (or 19 to 180 μF)
D1, Output Diode
R1, R2, FB Resistors
R3, FB Resistor
T1, Transformer
R1 = R2 = 4.99 MΩ (1206)
R3 = 39.4 kΩ (0603)
R1 and R2 together need to have a breakdown voltage of at
Component
V
D _ Peak
R
1
R
3
R
V
2
OUT
V
V
OUT
FB
Photoflash Capacitor Charger with IGBT Driver and Refresh
N
0.1 μF, ±10%, 16 V X7R ceramic
capacitor (0603)
4.7 μF, ±10%, 10 V, X5R ceramic
capacitor (0805)
2 x 250 V, 225 mA, 5 pF
4.99 MΩ,
39.0 kΩ
1:10.2, L
1:10.2, L
1:10, L
V
1 .
BATT
Primary
D_Peak
.
1
Primary
Primary
/
1
10
/
4
W ±1% (0603)
W ±1% (1206)
= 10.8 μH
, occurs when the
= 12 μH
= 14.5 μH
Rating
(3)
(4)
The peak current of the rectifying diode, ID_Peak, is calculated as:
Input Capacitor Selection
Ceramic capacitors with X5R or X7R dielectrics are recom-
mended for the input capacitor, C2. It should be rated at least
4.7 μF / 6.3 V to decouple the battery input, V
of the transformer. When using a separate bias, V
A8439 VIN supply, connect at least a 0.1 μF / 6.3 V bypass
capacitor to the VIN pin.
Layout Guidelines
Key to a good layout for the photoflash capacitor charger circuit
is to keep the parasitics minimized on the power switch loop
(transformer primary side) and the rectifier loop (secondary side).
Use short, thick traces for connections to the transformer primary
and SW pin.
Output voltage sensing circuit elements must be kept away from
switching nodes such as SW pin. It is important that the
signal trace and other signal traces be routed away from the
transformer and other switching traces, in order to minimize noise
pickup. In addition, high voltage isolation rules must be followed
carefully to avoid breakdown failure of the circuit board.
GRM188R71C104KA01D
LMK212BJ475KG
EPH-331ELL101B131S
BAV23S
9C12063A4994FKHFT
9C06031A3902FKHFT
LDT565630T-002
T-16-024A
ST-532517A
Part Number
I
D _ Peak
I
Primary_Peak
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
/
N
Murata
Taiyo Yuden
Chemi-Con
Philips Semiconductor,
Fairchild Semiconductor
Yageo
Yageo
TDK
Tokyo Coil Engineering
Asatech
.
BATT
Source
BIAS
, at the primary
, for the
¯ D ¯ ¯ O ¯ ¯ N ¯ ¯ E ¯
(5)
13

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