lm27241 National Semiconductor Corporation, lm27241 Datasheet
lm27241
Related parts for lm27241
lm27241 Summary of contents
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... It is ideally suited for battery powered applications such as laptop and notebook computers. The LM27241 requires only N-channel FETs for both the upper and lower positions of the synchronous stage. It features line feedforward to improve the response to input transients. At ...
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... Connection Diagram Ordering Information Order Number LM27241MTC LM27241MTCX Pin Description Pin 1, VDD: 5V supply rail for the control and logic sections. For normal operation the voltage on this pin must be brought above 4.5V. Subsequently, the voltage on this pin (including any ripple component) should not be allowed to fall below 4V for a duration longer than 7µ ...
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... But the LM27241 does not allow the duty cycle to fall by more than 15% of its original value (at the CCM-DCM boundary). This forces pulse-skipping, and the average frequency is effec- tively decreased as the load decreases ...
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Pin Description (Continued) line feedforward feature. The VIN pin is also used with the SENSE pin voltage to predict the CCM (continuous conduc- tion mode) duty cycle and to thereby set the minimum al- www.national.com lowed DCM duty cycle to ...
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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Voltages from the indicated pins to SGND/PGND unless otherwise indicated (Note 2): VIN V5 VDD BOOT BOOT to SW ...
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Electrical Characteristics Specifications with standard typeface are for T ture range. VDD = V5 = 5V, V SGND Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. Symbol Parameter Power Good V Power Good Upper PGOOD_HI Threshold ...
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... Note the frequency adjust resistor between FREQ pin and Ground. FADJ Note 6: If the LM27241 starts up with a pre-charged soft start capacitor, it will first discharge the capacitor to V process. Note 7: Typical numbers are at 25˚C and represent the most likely norm. ...
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Block Diagram www.national.com 8 20120101 ...
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Typical Performance Characteristics most curve to lowermost curve in each of the Efficiency plots below. Efficiency for 2.5V Output Efficiency for 1.05V Output Input Voltage is 12V, 18V, 24V (in order) starting from upper- Efficiency for 1.5V Output 20120105 Modulator ...
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... Because of a minimum pulse width of about 30ns for the LM27241, very low duty cycles (low output, high input) are possible. The main advantage of current-mode control is the fact that the slope of its ramp (derived from the switch current), automati- cally increases with increase in input voltage ...
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... CCM-DCM boundary), but as the load de- creases, the duty cycle would try to shrink to zero. However, in the LM27241, the DCM duty cycle is not allowed to fall below 85% of the CCM value. So when the theoretically required DCM duty cycle value falls below what the LM27241 is allowed to deliver (in this mode), pulse-skipping starts ...
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... FET. It must be kept in mind that though the LM27241 has current limiting for current passing in the ‘positive’ direction (i.e. passing from source to drain of the lower FET), there is no limit for reverse currents. The amount of reverse current when the FPWM pin is toggled ‘ ...
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... FPWM mode or the SKIP mode has been selected. SHUTDOWN/SOFT-SHUTDOWN When the EN pin is driven low, the LM27241 initiates shut- down by turning OFF both upper and lower FETs completely (this occurs irrespective of FPWM or SKIP modes). See Figure 6 for a typical shutdown plot and note that the LDRV goes to zero (and stays there) ...
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Operation Descriptions CH1: PGOOD, CH2: VIN, CH3: LDRV, CH4: Vo Output 1V @ 0.02A, VIN = 9.75V, FPWM 10µ 300kHz, C 660µF FIGURE 8. VIN Removal in FPWM Mode CH1: PGOOD, CH2: VIN, CH3: LDRV, CH4: ...
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Operation Descriptions CH1: PGOOD, CH2: Vo, CH3: ILIM Pin, CH4 Output 1V, 0.04A to Overload, VIN = 10V, FPWM 10µ 300kHz, RLIM = 1k FIGURE 10. Response to Severe Overload (Type A: fault threshold ...
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... The design table in the referenced Application Note uses V D nous configuration. Also, V (high-side FET). In the case of the LM27241 a reasonable approximation is to set V available in AN-1197. Then the table can be used easily for selection of the inductor and output capacitor. A step by step ...
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Application Information Only in the case of the input capacitor, the situation may be different as is explained next. FIGURE 13. Evaluation Board Transient Response V = 1.50VDC 14V OUT IN Iout step = 2.5A to 5A, and ...
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... Application Note AN-1229 at http:// power.national.com . Figure 15 is based on such an understanding of the critical sections and also the pin functions of the LM27241. Refer to the Typical Applications circuit and the LM27241 TSSOP pinouts to understand the layout suggestions more thor- oughly ...
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... Application Information COMPENSATION Modulator Gain The LM27241 input voltage feed forward mechanism changes the Error Amp ramp slope, and peak to peak volt- age. The DC gain of the Modulator is dependent on the peak to peak voltage of the oscillator’s ramp. The oscillator peak to peak voltage can be determined by referring back to the Oscillator section in the Electrical Characteristics table ...
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Application Information Zero Frequency due ESR Complex Poles due to output inductor and output capacitors: Type III Compensator (PID) FIGURE 16. Type III Compensator (PID) Type III Compensator Transfer Function The Type III compensation is needed in ...
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... R = 3.32kΩ 4 EVALUATION BOARD DETAILS The Bill of Materials (BOM) is now provided for the LM27241 evaluation board. The schematic is the typical application circuit. See Layout Guidelines for more guidance on pre- ferred layout practices and also refer to Application Note AN-1229. Note that a dual FET pack has been chosen for the evaluation board ...
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Bill of Materials Designator Function U1 Synchronous Buck Controller R1 Feedback Resistor R2 Compensation Resistor R3 Compensation Resistor R4 Feedback Resistor R5 Dynamic Feedback Resistor R6 Enable pull up resistor R7 FPWM pull up resistor R8 Q3 Gate to GND ...
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PCB Layout Diagrams www.national.com FIGURE 18. Top Overlay FIGURE 19. Top Layer 24 20120162 20120163 ...
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PCB Layout Diagrams (Continued) FIGURE 20. Internal Plane 1 (GND) FIGURE 21. Internal Plane 2 25 20120164 20120165 www.national.com ...
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PCB Layout Diagrams www.national.com (Continued) FIGURE 22. Bottom Layer 26 20120166 ...
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Physical Dimensions inches (millimeters) unless otherwise noted National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and ...