hip6004a Intersil Corporation, hip6004a Datasheet
hip6004a
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hip6004a Summary of contents
Page 1
... The HIP6004A monitors the output voltage with a window comparator that tracks the DAC output and issues a Power Good signal when the output is within ±10%. The HIP6004A protects against over-current and over-voltage conditions by inhibiting PWM operation. Additional built-in over-voltage protection triggers an external SCR to crowbar the input supply ...
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... Block Diagram VSEN OCSET REFERENCE VID0 TTL D/A VID1 CONVERTER VID2 VID3 (DAC) VID4 FB COMP RT 2 HIP6004A +12V VCC OCSET MONITOR AND EN PROTECTION BOOT OSC UGATE PHASE HIP6004A - LGATE + + - PGND COMP GND VSEN 110 90 OVER- 115% VOLTAGE + - + - OVER- CURRENT 200µA 4V PWM ...
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... Over-Voltage Trip (V /DACOUT) VSEN OCSET Current Source OVP Sourcing Current Soft Start Current 3 HIP6004A Thermal Information Thermal Resistance (Typical, Note 1) SOIC Package (Note Maximum Junction Temperature (Plastic Package) 150 Maximum Storage Temperature Range . . . . . . . . . -65 Maximum Lead Temperature (Soldering 10s 300 (SOIC - Lead Tips Only) ...
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... VSEN PGOOD Voltage Low Typical Performance Curves 1000 R PULLUP T TO +12V 100 100 SWITCHING FREQUENCY (kHz) FIGURE 1. R RESISTANCE vs FREQUENCY T 4 HIP6004A SYMBOL TEST CONDITIONS V Rising VSEN V Falling VSEN Upper and Lower Threshold -5mA PGOOD PGOOD ...
Page 5
... GND (Pin 11) Signal ground for the IC. All voltage levels are measured with respect to this pin. 5 HIP6004A PGOOD (Pin 12) PGOOD is an open collector output used to indicate the status of the converter output voltage. This pin is pulled low RT when the converter output is not within ±10% of the OVP DACOUT reference voltage ...
Page 6
... Functional Description Initialization The HIP6004A automatically initializes upon receipt of power. Special sequencing of the input supplies is not necessary. The Power-On Reset (POR) function continually monitors the input supply voltages. The POR monitors the bias voltage at the VCC pin and the input voltage (V the OCSET pin ...
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... A small ceramic capacitor should be placed in parallel with R to smooth the voltage across R OCSET presence of switching noise on the input voltage. Output Voltage Program The output voltage of a HIP6004A converter is programmed to discrete levels between 1.8V 3.5V . The voltage identification (VID) pins program an DC internal voltage reference (DACOUT) with a TTL- compatible 5-bit digital-to-analog converter (DAC) ...
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... Figure 5 should be located as close together as possible. Please note that the capacitors C and C each represent numerous physical capacitors. O Locate the HIP6004A within 3 inches of the MOSFETs, Q and Q . The circuit traces for the MOSFETs’ gate and 2 source connections from the HIP6004A must be sized to handle peak current ...
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... Given a sufficiently fast control loop design, the HIP6004A will provide either 0% or 100% duty cycle in response to a load transient. The response time is the time required to slew the inductor current from an initial current value to the transient current level ...
Page 10
... Standard-gate MOSFETs are normally recommended for use with the HIP6004A. However, logic-level gate MOSFETs can be used under special circumstances. The input voltage, upper gate drive level, and the MOSFET’s absolute gate-to- source voltage rating determine whether logic-level MOSFETs are appropriate. ...
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... MOSFET and turning on the upper MOSFET. The diode must be a Schottky type to prevent the lossy parasitic MOSFET body diode from conducting. 11 HIP6004A +12V +5V OR LESS V CC BOOT Q1 ...
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... Equivalent 3A, 40V Schottky, Motorola MBR340 or Equivalent , Intersil MOSFET; RFP70N03 2 12 HIP6004A Application Note AN9672. Although the Application Note details the HIP6004, the same evaluation platform can be used to evaluate the HIP6004A. - 1µ 2N6394 5x 1000µF +12V 0.1µF VCC ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 HIP6004A M20.3 (JEDEC MS-013-AC ISSUE C) 20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE ...