hip6019cb Intersil Corporation, hip6019cb Datasheet - Page 11

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hip6019cb

Manufacturer Part Number
hip6019cb
Description
Advanced Dual Pwm And Dual Linear Power Control
Manufacturer
Intersil Corporation
Datasheet

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The modulator transfer function is the small-signal transfer
function of V
gain and the output filter, with a double pole break frequency
at F
simply the input voltage, V
oscillator voltage, V
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
internal to the HIP6019 and the impedance networks Z
and Z
provide a closed loop transfer function with an acceptable
0dB crossing frequency (f
Phase margin is the difference between the closed loop
phase at f
the compensation network’s poles, zeros and gain to the
components (R1, R2, R3, C1, C2, and C3) in Figure 11.
Use these guidelines for locating the poles and zeros of the
compensation network:
F
1. Pick Gain (R2/R1) for desired converter bandwidth.
2. Place 1
3. Place 2
4. Place 1
5. Place 2
FIGURE 11. VOLTAGE-MODE BUCK CONVERTER COMPEN-
LC
V
OSC
LC
=
FB
--------------------------------------- -
2
and a zero at F
. The goal of the compensation network is to
0dB
OSC
ST
ND
ST
ND
OUT
L
1
ERROR
SATION DESIGN
O
AMP
and 180 degrees The equations below relate
Zero below filter’s Double Pole (~75% F
Pole at the ESR Zero.
Zero at filter’s Double Pole.
Pole at half the switching frequency.
HIP6019
V
/V
C
E/A
O
COMP
DETAILED FEEDBACK COMPENSATION
PWM
E/A
Z
+
-
OSC
COMP
+
-
FB
C1
ESR
REFERENCE
. This function is dominated by a DC
REFERENCE
.
2-262
0dB
IN
C2
. The DC gain of the modulator is
+
-
DRIVER
DRIVER
R2
, divided by the peak-to-peak
F
) and adequate phase margin.
ESR
Z
IN
=
Z
---------------------------------------- -
2
FB
FB
V
IN
PHASE
C3
ESR C
(PARASITIC)
1
Z
R1
L
IN
O
ESR
R3
C
O
V
O
OUT
LC
V
IN
).
OUT
HIP6019
Compensation Break Frequency Equations
Figure 12 shows an asymptotic plot of the DC-DC
converter’s gain vs frequency. The actual modulator gain has
a peak due to the high Q factor of the output filter at F
which is not shown in Figure 12. Using the above guidelines
should yield a compensation gain similar to the curve
plotted. The open loop error amplifier gain bounds the
compensation gain. Check the compensation gain at F
with the capabilities of the error amplifier. The closed loop
gain is constructed on the log-log graph of Figure 12 by
adding the modulator gain (in dB) to the compensation gain
(in dB). This is equivalent to multiplying the modulator
transfer function to the compensation transfer function and
plotting the gain.
The compensation gain uses external impedance networks
Z
stable control loop has a 0dB gain crossing with
-20dB/decade slope and a phase margin greater than 45
degrees. Include worst case component variations when
determining phase margin.
Oscillator Synchronization
The PWM controllers use a triangle wave for comparison with
the error amplifier output to provide a pulse-width modulated
wave. Should the output voltages of the two PWM converters
be programmed close to each other, then cross-talk could
cause nonuniform PHASE pulse-widths and increased output
voltage ripple. The HIP6019 avoids this problem by
synchronizing the two converters 180 out-of-phase for DAC
F
F
FIGURE 12. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
6. Check Gain against Error Amplifier’s Open-Loop Gain.
7. Estimate Phase Margin - repeat if necessary.
FB
Z1
Z2
100
-20
-40
-60
80
60
40
20
0
and Z
=
=
-----------------------------------
2
------------------------------------------------------ -
2
10
(R
20LOG
2
MODULATOR
IN
/R
R2 C1
R1
1
1
to provide a stable, high bandwidth loop. A
)
GAIN
100
+
1
R3
1K
F
C3
Z1
F
FREQUENCY (Hz)
LC
F
Z2
10K
F
F
F
F
P1
P2
P1
ESR
(V
100K
=
=
IN
20LOG
F
/ V
------------------------------------------------------ -
2
-----------------------------------
2
P2
OSC
OPEN LOOP
ERROR AMP GAIN
R
R3 C3
1
)
1M
2
COMPENSATION
GAIN
1
CLOSED LOOP
C1 C2
--------------------- -
C1
GAIN
10M
+
C2
LC
P2
,

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