r2j20601np Renesas Electronics Corporation., r2j20601np Datasheet - Page 12

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r2j20601np

Manufacturer Part Number
r2j20601np
Description
Driver - Mos Fet Integrated Sip Drmos
Manufacturer
Renesas Electronics Corporation.
Datasheet

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R2J20601NP
The equivalent circuit for the PWM-pin input is shown in the next figure. M1 is in the ON state during normal
operation; after the PWM input signal has stayed in the hysteresis window for 240 ns (typ.) and the tri-state detection
signal has been driven high, the transistor M1 is turned off. From this circuit configuration, we can see that the voltage
on the PWM pin when open-circuit will be about 2.5 V, so the tri-state protection function will operate.
For the high-side driver, the BOOT pin is the power-supply voltage pin and voltage VSWH provides a standard for
operation of the high-side driving circuit. Consequently, the difference between the voltage on the BOOT and VSWH
pins becomes the gate swing for the high-side MOS FET. Connect a bootstrap capacitor between the BOOT pin and the
VSWH pin. Since the Schottky barrier diode (SBD) is connected between the BOOT and Reg5V pins, this bootstrap
capacitor is charged up to 5 V. When the high-side MOS FET is turned on, voltage VSWH becomes equal to VIN, so
VBOOT is boosted to VSWH + 5 V.
The GH and GL pins are the gate-monitor pins for each MOS FET.
MOS FETs
The MOS FETs incorporated in R2J20601NP are highly suitable for synchronous-rectification buck conversion. For
the high-side MOS FET, the drain is connected to the VIN pin and the source is connected to the VSWH pin. For the
low-side MOS FET, the drain is connected to the VSWH pin and the source is connected to the PGND pin.
Rev.5.00 Apr 10, 2006 page 12 of 13
PWM pin
Figure 2 Equivalent Circuit for the PWM-pin Input
M1
50 k
50 k
Input logic
Reg5V
Tri-state detection signal
To internal control

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