vn772kp-e STMicroelectronics, vn772kp-e Datasheet - Page 26
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vn772kp-e
Manufacturer Part Number
vn772kp-e
Description
Quad Smart Power Solid State Relay For Complete H-bridge Configurations
Manufacturer
STMicroelectronics
Datasheet
1.VN772KP-E.pdf
(33 pages)
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Thermal data
4.2
Table 19.
4.2.1
4.2.2
4.2.3
4.2.4
b. Calculation is valid in any dynamic operating condition. Pd values set by user.
26/33
HS
On
Off
1
HS
Off
On
2
Thermal calculation in clockwise and anti-clockwise
operation in steady state mode
Thermal calculation in clockwise and anti-clockwise operation in steady state mode
Thermal resistances definition
Values according to the PCB heatsink area.
R
in on-state)
R
R
high side and low side chips
R
Thermal calculation in transient mode
T
T
T
Single pulse thermal impedance definition
Values according to the PCB heatsink area.
Z
Z
Z
high side and low side chips
Z
Pulse calculation formula
where δ = t
Z
jHS12
jLS3
jLS4
thHS
thLS
thHSLS
thLSLS
thHS
thLS
thHSLS
thLSLS
THδ
LS
Off
On
= Z
= Z
3
= Z
= R
= high side chip thermal impedance junction to ambient
= R
= Z
=
= Z
= R
= Z
= R
thHSLS
thHSLS
thLS3
R
thLS3
thHS1
thHS
LS
On
Off
TH
P
thLS3LS4
thHS12LS3
thLS3LS4
thHS1LS4
/T
4
= Z
⋅
= R
x P
= R
δ
x P
x P
+
thLS4
P
P
dHS12
thLS4
Z
thHS2
dHS12
dHS12
dHS1
dHS2
= mutual thermal impedance junction to ambient between low side chips
THtp
= mutual thermal resistance junction to ambient between low side chips
= R
= Z
R
R
= low side chip thermal impedance junction to ambient
thHSLS
thHSLS
x R
x R
= low side chip thermal resistance junction to ambient
= high side chip thermal resistance junction to ambient (HS
+ Z
thHS12LS4
thHS2LS3
(
+ Z
+ Z
1 δ
T
thHS
thHS
jHS12
–
thHSLS
thLS
thLSLS
+ T
+ T
Doc ID 022022 Rev 1
)
+ P
+ P
amb
amb
x P
= mutual thermal resistance junction to ambient between
= mutual thermal impedance junction to ambient between
dLS4
dLS3
x (P
x P
dLS3
dLS3
x
x
dLS3
+ Z
P
P
+ Z
+ P
dHS1
dHS2
thLSLS
thLS
x R
dLS4
x R
(b)
x R
x R
thLSLS
thLS
x P
x P
) + T
T
thHSLS
thHSLS
jLS3
dLS4
dLS4
+ T
+ T
amb
amb
+ P
+ P
amb
+ T
+ T
dLS4
dLS3
amb
amb
P
P
dHS1
dHS2
R
x R
x R
R
thLSLS
thLS
thHSLS
thHSLS
T
jLS4
+ T
VN772KP-E
+ T
amb
+ P
+ P
amb
1
or HS
dLS4
dLS3
x
x
2