aoz1056 Alpha & Omega Semiconductor, aoz1056 Datasheet - Page 8

• Manufacturer Part Number: aoz1056
• Description: Ezbucktm 2a Simple Buck Regulator
• Manufacturer: Alpha & Omega Semiconductor

Output Voltage Programming
Output voltage can be set by feeding back the output to
the FB pin with a resistor divider network. In the
application circuit shown in Figure 1. The resistor divider
network includes R
by picking a fixed R
R
Some standard values of R
used output voltage values are listed in Table 1.
Table 1.
The combination of R
avoid drawing excessive current from the output, which
will cause power loss.
Since the switch duty cycle can be as high as 100%, the
maximum output voltage can be set as high as the input
voltage minus the voltage drop on upper PMOS and
inductor.
Protection Features
The AOZ1056 has multiple protection features to prevent
system circuit damage under abnormal conditions.
Over Current Protection (OCP)
The sensed inductor current signal is also used for over
current protection. Since the AOZ1056 employs peak
current mode control, the COMP pin voltage is
proportional to the peak inductor current. The COMP
pin voltage is limited to be between 0.4V and 2.5V
internally. The peak inductor current is automatically
limited cycle by cycle.
The cycle-by-cycle current limit threshold is set between
2.5A and 3.6A. When the load current reaches the
current limit threshold, the cycle-by-cycle current limit
circuit turns off the high side switch immediately to
V
1
O
Rev. 1.2 September 2008
with equation below.
=
V
0.8
O
0.8
1.2
1.5
1.8
2.5
3.3
5.0
(V)
×
⎛
⎜
⎝
1
+
1
R
------ -
R
2
and R
1
2
value and calculating the required
1
⎞
⎟
⎠
and R
R
1
2
4.99
12.7
21.5
31.6
52.3
1
1.0
. Usually, a design is started
10
(kΩ)
and R
2
should be large enough to
2
for most commonly
R
Open
2
11.5
10.2
10
10
10
10
(kΩ)
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terminate the current duty cycle. The inductor current stop
rising. The cycle-by-cycle current limit protection directly
limits inductor peak current. The average inductor current
is also limited due to the limitation on peak inductor cur-
rent. When cycle-by-cycle current limit circuit is triggered,
the output voltage drops as the duty cycle decreases.
The AOZ1056 has internal short circuit protection to
protect itself from catastrophic failure under output short
circuit conditions. The FB pin voltage is proportional to the
output voltage. Whenever FB pin voltage is below 0.2V,
the short circuit protection circuit is triggered. As a result,
the converter is shut down and hiccups. The converter will
start up via a soft start once the short circuit condition
disappears. In short circuit protection mode, the inductor
average current is greatly reduced.
Output Over Voltage Protection (OVP)
The AOZ1056 monitors the feedback voltage: when the
feedback voltage is higher than 960mV, it immediately
turns-off the PMOS to protect the output voltage over-
shoot at fault condition. When feedback voltage is lower
than 860mV, the PMOS is allowed to turn on in the next
cycle.
UVLO
A UVLO circuit monitors the input voltage. When the input
voltage exceeds 4V, the converter starts operation. When
input voltage falls below 3.7V, the converter will stop
switching.
Thermal Protection
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit and
high side PMOS if the junction temperature exceeds
150°C. The regulator will restart automatically under the
control of soft-start circuit when the junction temperature
decreases to 100°C.
Application Information
The basic AOZ1056 application circuit is shown in
Figure 1. Component selection is explained below.
Input Capacitor
The input capacitor (C
to the V
steady input voltage and filter out the pulsing input
current. A small decoupling capacitor (C
usually 1µF, should be connected to the V
AGND pin for stable operation of the AOZ1056. The
voltage rating of input capacitor must be greater than
maximum input voltage + ripple voltage.
IN
pin and PGND pin of the AOZ1056 to maintain
1
in Figure 1) must be connected
d
in Figure 1),
IN
AOZ1056
pin and
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