aoz1092d Alpha & Omega Semiconductor, aoz1092d Datasheet - Page 11

• Manufacturer Part Number: aoz1092d
• Description: Ezbucktm 3a Simple Buck Regulator
• Manufacturer: Alpha & Omega Semiconductor

where;
where f
V
G
G
The compensation capacitor C
make a zero. This zero is put somewhere close to the
dominate pole f
over frequency. C
The above equation can be simplified to:
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Thermal Management and Layout
Consideration
In the AOZ1092D buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the V
LX pins, to the filter inductor, to the output capacitor and
load, and then return to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the anode of Schottky
diode, to the cathode of Schottky diode. Current flows in
the second loop when the low side diode is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect input
capacitor, output capacitor, and PGND pin of the
AOZ1092D.
In the AOZ1092D buck regulator circuit, the major power
dissipating components are the AOZ1092D and output
inductor. The total power dissipation of converter circuit
can be measured by input power minus output power.
The power dissipation of inductor can be approximately
calculated by output current and DCR of the inductor.
C
C
P
FB
P
EA
CS
Rev. 1.3 February 2009
inductor_loss
C
C
total_loss
is 0.8V,
is the error amplifier transconductance, which is 200 x 10
is the current sense circuit transconductance, which is 6.86 A/V
=
=
C
is desired crossover frequency,
---------------------------------- -
2π
C
---------------------
O
R
×
×
3
=
1.5
R
R
p1
C
L
V
=
×
C
IN
but lower than 1/5 of selected cross-
I
O
f
can is selected by:
p1
×
2
I
×
IN
R
–
inductor
V
O
C
×
and resistor R
I
O
×
1.1
IN
pin, to the
C
-6
together
A/V, and
www.aosmd.com
The actual junction temperature can be calculated with
power dissipation in the AOZ1092D and thermal
impedance from junction to ambient.
The maximum junction temperature of AOZ1092D is
150ºC, which limits the maximum load current capability.
Please see the thermal de-rating curves for maximum
load current of the AOZ1092D under different ambient
temperature.
The thermal performance of the AOZ1092D is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental
conditions.
Several layout tips are listed below for the best electric
and thermal performance. Figure 3 on the next page
illustrates a PCB layout example as reference.
1. Do not use thermal relief connection to the V
2. Input capacitor should be connected to the V
3. A ground plane is preferred. If a ground plane is not
4. Make the current trace from LX pins to L to Co to the
5. Pour copper plane on all unused board area and
6. The two LX pins are connected to internal PFET
7. Keep sensitive signal trace far away form the LX
T
junction
and the PGND pin. Pour a maximized copper area to
the PGND pin and the V
dissipation.
and the PGND pin as close as possible.
used, separate PGND from AGND and connect them
only at one point to avoid the PGND pin noise
coupling to the AGND pin.
PGND as short as possible.
connect it to stable DC nodes, like V
drain. They are low resistance thermal conduction
path and most noisy switching node. Connected a
copper plane to LX pin to help thermal dissipation.
This copper plane should not be too larger otherwise
switching noise may be coupled to other part of
circuit.
pins.
=
(
P
total_loss
–
P
IN
inductor_loss
pin to help thermal
IN
AOZ1092D
, GND or V
) Θ
Page 11 of 16
×
JA
IN
IN
pin
+
OUT
T
amb
.