aoz1212 Alpha & Omega Semiconductor, aoz1212 Datasheet - Page 10

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aoz1212

Manufacturer Part Number
aoz1212
Description
3a Simple Buck Regulator
Manufacturer
Alpha & Omega Semiconductor
Datasheet

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The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
where;
C
R
ESR
The compensation design is actually to shape the
converter close loop transfer function to get desired gain
and phase. Several different types of compensation
network can be used for AOZ1212. For most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
In the AOZ1212, FB pin and COMP pin are the inverting
input and the output of internal transconductance error
ampli er . A series R and C compensation network
connected to COMP provides one pole and one zero.
The pole is:
where;
G
A/V,
G
The zero given by the external compensation network,
capacitor C
Figure 1), is located at:
f
To design the compensation circuit, a target crossover
frequency f
crossover frequency is where the control loop has unity
gain. The crossover frequency is also called the
converter bandwidth. Generally a higher bandwidth
means faster response to load transient. However, the
bandwidth should not be too high due to system stability
concern. When designing the compensation loop,
converter stability under all line and load condition must
be considered.
Usually, it is recommended to set the bandwidth to be
less than 1/10 of switching frequency. It is recommended
to choose a crossover frequency less than 30kHz.
f
f
f
C
Z 2
Z 1
O
L
p2
EA
VEA
Rev. 1.1 October 2007
is load resistor value, and
is the output lter capacitor ,
=
CO
is the error ampli er tr ansconductance, which is 200 x 10
=
=
=
is the error ampli er v oltage
30kHz
is the equivalent series resistance of output capacitor.
------------------------------------------ -
2
------------------------------------ -
2
------------------------------------------------- -
2
C
C
for close loop must be selected. The system
C
(C5 in Figure 1) and resistor R
C
C
G
1
C
C
O
EA
1
G
R
ESR
VEA
C
CO
C
(R1 in
www.aosmd.com
-6
The strategy for choosing R
over frequency with R
with C
calculate R
where;
f
V
G
A/V, and
G
5.64 A/V
The compensation capacitor C
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of the selected
crossover frequency. C
The equation above can also be simpli ed to:
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Thermal Management and Layout
Consideration
In the AOZ1212 buck regulator circuit, high pulsing
current o ws through two circuit loops. The rst loop
starts from the input capacitors, to the V
pins, to the lter inductor , to the output capacitor and
load, and then returns to the input capacitor through
ground. Current o ws in the rst loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the GND pin of the
AOZ1212, to the LX pins of the AZO1212. Current o ws
in the second loop when the low side diode is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves ef ciency . A ground
plane is recommended to connect input capacitor, output
capacitor, and GND pin of the AOZ1212.
In the AOZ1212 buck regulator circuit, the three major
power dissipating components are the AOZ1212,
external diode and output inductor. The total power
R
C
C
C
FB
EA
CS
C
is desired crossover frequency,
C
C
is 0.8V,
is the error ampli er tr ansconductance, which is 200x10
is the current sense circuit transconductance, which is
=
=
=
C
. Using selected crossover frequency, f
f
------------------------------------
2
C
----------------------
C
O
R
C
:
C
-----------
V
R
V
1.5
R
FB
C
O
L
f
----------------------------- -
G
p1
C
2
EA
C
and set the compensator zero
can is selected by:
C
C
G
and C
O
CS
C
and resistor R
C
is to set the cross
IN
pin, to the LX
AOZ1212
Page 10 of 19
C
C
, to
together
-6

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