l9942 STMicroelectronics, l9942 Datasheet - Page 22

• Manufacturer Part Number: l9942
• Description: Integrated Stepper Motor Driver For Bipolar Stepper Motors With Microstepping And Programmable Current Profile
• Manufacturer: STMicroelectronics

Functional description of the logic with SPI
Note:
4.6
4.7
4.8
Figure 9.
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DI
CLK
CSN
Due to this safety functionality a daisy chaining of SPI is not possible. Instead, a parallel
operation of the SPI bus by controlling the CSN signal of the connected ICs is
recommended.
Serial data out (DO)
The data output driver is activated by a logical low level at the CSN input and will go from
high impedance to a low or high level depending on the status bit 0 (fault condition). The first
rising edge of the CLK input after a high to low transition of the CSN pin will transfer the
content of the selected status register into the data out shift register. Each subsequent
falling edge of the CLK will shift the next bit out.
Serial clock (CLK)
The CLK input is used to synchronize the input and output serial bit streams. The data input
(DI) is sampled at the rising edge of the CLK and the data output (DO) will change with the
falling edge of the CLK signal.
Data register
The device has eight data registers. The first three bits (bit0 ... bit2) at the DI-input are used
to select one of the input registers. All bits are first shifted into an input shift register. After
the rising edge of CSN the contents of the input shift register will be written to the selected
Input Data Register only if a frame of exact 16 data bits are detected. The selected register
will be transferred to DO during the current communication frame.
SPI and registers
INT_2MHz
POR
Controll
SPI-
Counter and Profiles Register 5
Control, Status and Profile
Control Register 0
Control Register 1
Counter and Profiles Register 2
Singnal and Profiles Register 3
Counter and Profiles Register 4
Status Register 7
CLK_ADR
SEL_ERROR
SPI2REG
D
D
D0
A0
Register 6
D1
A1
D2
A2
Status
Status
D3
CLR
DC2
CLR
P4
I4
I4
I4
I4
DAC_Scale
Temperature
SST
DC1
TSD
Phase Counter
D4
P3
I3
I3
I3
I3
Current Profile 1
Current Profile 3
Current Profile 5
Current Profile 7
DC0
Filter
D5
P2
TW
I2
I2
I2
I2
PWM
Freq
D6
BI4
P1
VS Monitor
OV
I1
I1
I1
I1
D7
BI3
ST
P0
I0
I0
I0
I0
UV
DAC Phase B
RREF
HSB2
Test
Error
D8
DM2
DT4
DT7
BI2
T2
T5
PWM Counter
PWM Counter
Test
Test
Decay Mode
Read-Only
Read-Only
PWM Counter
Phase
HSB1
D9
DT3
DM1
DT1
DT6
BI1
T4
B
Openload
NPWM
Phase
LSB2
Read Only
PWM
DT2
D10
DM0
DT0
DT5
BI0
T3
A
LSB1
D11
SR1
Slew Rate
AI4
I4
I4
I4
I4
I4
Overcurrent
HSA2
D12
SR0
Current Profile 0
Current Profile 2
Current Profile 4
Current Profile 6
Current Profile 8
AI3
DAC Phase A
I3
I3
I3
I3
I3
HSA1 LSA2
Step Mode
ST1
AI2
A0
I2
I2
I2
I2
I2
ST0
A1
AI1
I1
I1
I1
I1
I1
LSA1
A2
DIR
AI0
I0
I0
I0
I0
I0
DO
L9942