tmp88ch40img TOSHIBA Semiconductor CORPORATION, tmp88ch40img Datasheet - Page 63
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tmp88ch40img
Manufacturer Part Number
tmp88ch40img
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88CH40IMG.pdf
(148 pages)
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9.3 Function
9.3.1 Timer mode
and the timer register 3A (TC3DRA) value is detected, an INTTC3 interrupt is generated and the up-counter is
cleared. After being cleared, the up-counter restarts counting. Setting TC3CR<ACAP> to 1 captures the up-
counter value into the timer register 3B (TC3DRB) with the auto-capture function. The count value during
timer operation can be checked by executing the read instruction to TC3DRB.
In the timer mode, the up-counter counts up using the internal clock. When a match between the up-counter
Note:00H which is stored in the up-counter immediately after detection of a match is not captured into TC3DRB.
(Figure 9-2)
Table 9-1 Source Clock for TimerCounter 3 (Example: fc = 20 MHz)
TC3CK
000
001
010
100
101
011
110
Clock
TC3DRA
Up-counter
TC3DRB
Resolution
409.6
204.8
102.4
51.2
25.6
12.8
[µs]
6.4
Figure 9-2 Auto-Capture Function
DV1CK = 0
Maximum Time Setting
C6
104.45
52.22
26.11
13.06
[ms]
6.53
3.06
1.63
C6
Note: In the case that TC3DRB is C8H
NORMAL, IDLE mode
Page 55
Match detect
C7
C7
Resolution
819.2
409.6
204.8
102.4
C8
51.2
25.6
12.8
[µs]
C8
00
C8
DV1CK = 1
Maximum Time Setting
01
208.90
104.45
52.22
13.06
26.11
6.53
3.06
[ms]
01
TMP88CH40IMG
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