tmp89fh42l TOSHIBA Semiconductor CORPORATION, tmp89fh42l Datasheet - Page 258

• Manufacturer Part Number: tmp89fh42l
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

16.13
Receiving Process
RA001
16.13
Table 16-10 and Table 16-11.
for example, by discarding the received data read from RD0BUF and receiving the data again.
the number of pieces of data that could not be received. Execute the error handling, for example, by receiving data
again from the beginning of the transfer. Basically, an overrun error occurs when the internal software processing
cannot follow the data transfer speed. It is recommended to slow the transfer baud rate or modify the software to
execute flow control.
Note 1: If multiple interrupts are used in the INTRXD0 interrupt subroutine, the interrupt should be enabled after reading UART0SR
Figure 16-18 shows an example of the receiving process. Details of flag judgments in the processing are shown in
If any framing error or parity error is detected, the received data has erroneous value(s). Execute the error handling,
If any overrun error is detected, the receiving of one or more pieces of data is unfinished. It is impossible to determine
(Received data is valid)
Receiving Process
UART0SR<OERR>
UART0SR<PERR>
UART0SR<FERR>
UART0SR<RBFL>
Receiving process
Read UART0SR
Data processing
Read RD0BUF
and RD0BUF.
END
When no receive interrupt is used
1
0
0
0
Parity error
Framing error
Overrun error
0
1
1
1
Figure 16-18 Example of Receiving Process
Error handling
Error handling
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(Received data is valid)
UART0SR<OERR>
INTRXD0 interrupt
UART0SR<PERR>
UART0SR<FERR>
Read UART0SR
Data processing
Read RD0BUF
subroutine
RETI
When a receive interrupt is used
0
0
0
1
Parity error
1
Framing error
1
Overrun error
Error handling
Error handling
TMP89FH42L