lm75b-5.0-mdc National Semiconductor Corporation, lm75b-5.0-mdc Datasheet - Page 5

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lm75b-5.0-mdc

Manufacturer Part Number
lm75b-5.0-mdc
Description
Digital Temperature Sensor And Thermal Watchdog With Two-wire Interface
Manufacturer
National Semiconductor Corporation
Datasheet
t
t
t
t
t
t
t
1
2
3
4
5
TIMEOUT
Symbol
OF
Symbol
Logic Electrical Characteristics
DIGITAL DC CHARACTERISTICS Unless otherwise noted, these specifications apply for +V
LM75BIMM-5, LM75CIM-5, and LM75CIMM-5 and +V
LM75CIMM-3 (Note 6). Boldface limits apply for T
noted.
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its rated operating conditions.
Note 2: When the input voltage (V
maximum package input current rating limits the number of pins that can safely exceedthe power supplies with an input current of 5 mA to four.
Note 3: See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” or the section titled “Surface Mount” found in a current National
Semiconductor Linear Data Book for other methods of soldering surface mount devices.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin.
Note 5: LM75 θ
in the table below:
Note 6: All part numbers of the LM75 will operate properly over the +V
at their nominal supply voltage. Accuracy will typically degrade 1˚C/V of variation in +V
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
I
LM75BIM-5, LM75BIMM-5, LM75CIM-5, and LM75CIMM-5 and +V
and LM75CIMM-3. C
T
meet or exceed the published specifications of the I
and SDA signals related to the LM75. They are not the I
2
J
C DIGITAL SWITCHING CHARACTERISTICS Unless otherwise noted, these specifications apply for +V
= T
LM75BIMM-3, LM75BIMM-5, LM75CIMM-3, LM75CIMM-5
MIN
SCL (Clock) Period
Data in Set-Up Time to SCL High
Data Out Stable after SCL Low
SDA Low Set-Up Time to SCL Low (Start Condition)
SDA High Hold Time after SCL High (Stop Condition)
SDA Time Low for Reset of Serial Interface (Note 13)
LM75BIM-3, LM75BIM-5, LM75CIM-3, LM75CIM-5
to T
Output Fall Time
JA
MAX
(thermal resistance, junction-to-ambient) when attached to a printed circuit board with 2 oz. foil similar to the one shown in Figure 3 is summarized
; all other limits T
L
(load capacitance) on output lines = 80 pF unless otherwise specified. Boldface limits apply for T
Parameter
Device Number
I
) at any pin exceeds the power supplies (V
A
Parameter
= T
J
= +25˚C, unless otherwise noted. The switching characteristics of the LM75 fully
2
A
C bus. The following parameters are the timing relationships between SCL
S
(Continued)
= T
S
= +3.3 Vdc for LM75BIM-3, LM75BIMM-3, LM75CIM-3, and
supply voltage range of 3V to 5.5V. The devices are tested and specified for rated accuracy
2
C
I
O
C bus specifications.
J
L
Conditions
= T
= 3 mA
= 400 pF
I
<
MIN
5
GND or V
LM75B
LM75C
to T
S
S
= +3.3 Vdc for LM75BIM-3, LM75BIMM-3, LM75CIM-3,
as it varies from the nominal value.
MAX
I
>
; all other limits T
+V
S
Conditions
) the current at that pin should be limited to 5 mA. The 20 mA
(Note 12)
Typical
NS Package
MUA08A
Number
M08A
(Note 12)
A
Typical
S
= T
= +5 Vdc for LM75BIM-5,
J
(Note 7)
Limits
= +25˚C, unless otherwise
250
01265804
Applicable
(Note 7)
Resistance (θ
Limits
S
100
100
100
325
Not
2.5
75
= +5 Vdc for
0
Thermal
200˚C/W
250˚C/W
www.national.com
ns (max)
(Limit)
Units
ms (max)
ms (min)
µs (min)
ns (min)
ns (min)
ns (min)
ns (min)
(Limit)
Units
JA
A
)
=

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