emc1413 Standard Microsystems Corp., emc1413 Datasheet - Page 29

• Manufacturer Part Number: emc1413
• Description: 1?c Temperature Sensor With Beta Compensation And Selectable Address
• Manufacturer: Standard Microsystems Corp.

ADDR
ADDR
02h
03h
09h
1°C Temperature Sensor with Beta Compensation and Selectable Address
Datasheet
SMSC EMC1413 / EMC1414
6.3
6.4
R/W
R/W
R/W
R
The Status Register reports general error conditions. To identify specific channels, refer to
6.10, "External Diode Fault
Limit Status
bits are cleared when the appropriate High Limit, Low Limit, or THERM Limit register has been read
or cleared.
Bit 7 - BUSY - This bit indicates that the ADC is currently converting. This bit does not cause either
the ALERT or THERM pins to be asserted.
Bit 4 - HIGH - This bit is set when any of the temperature channels exceeds its programmed high limit.
See the High Limit Status Register for specific channel information
Register"). When set, this bit will assert the ALERT pin.
Bit 3 - LOW - This bit is set when any of the temperature channels drops below its programmed low
limit. See the Low Limit Status Register for specific channel information
Status
Bit 2 - FAULT - This bit is asserted when a diode fault is detected on any of the external diode
channels. See the External Diode Fault Register for specific channel information
"External Diode Fault
Bit 1 - THERM - This bit is set when the any of the temperature channels exceeds its programmed
THERM limit. See the THERM Limit Status Register for specific channel information
"THERM Limit Status
The Configuration Register controls the basic operation of the device. This register is fully accessible
at either address.
Bit 7 - MASK_ALL - Masks the ALERT pin from asserting.
Bit 6 - RUN / STOP - Controls Active/Standby modes.
Bit 5 - ALERT/COMP - Controls the operation of the ALERT pin.
Status Register
Configuration Register
Configuration
REGISTER
REGISTER
‘0’ (default) - The ALERT pin is not masked. If any of the appropriate status bits are set the ALERT
pin will be asserted.
‘1’ - The ALERT pin is masked. It will not be asserted for any interrupt condition unless it is
configured as a secondary THERM pin. The Status Registers will be updated normally.
‘0’ (default) - The device is in Active mode and converting on all channels.
‘1’ -The device is in Standby mode and not converting.
‘0’ (default) - The ALERT pin acts as described in
Status
Register"). When set, this bit will assert the ALERT pin.
Register", and
MASK_
BUSY
ALL
B7
B7
Register"). When set, this bit will assert the THERM pin.
Register"). When set, this bit will assert the ALERT pin.
RUN /
STOP
Table 6.4 Configuration Register
Section 6.17, "THERM Limit Status
B6
B6
Register",
-
Table 6.3 Status Register
DATASHEET
ALERT/
COMP
B5
B5
-
Section 6.15, "High Limit Status
29
HIGH
RECD
B4
B4
1
LOW
Section 5.3, "ALERT
RECD
B3
B3
2
Register". The individual Status Register
FAULT
RANGE
B2
B2
(Section 6.15, "High Limit Status
Register",
THERM
DAVG_
B1
(Section 6.16, "Low Limit
Output".
DIS
B1
Revision 1.37 (12-23-09)
Section 6.16, "Low
APDD
B0
(Section 6.10,
-
B0
(Section 6.17,
-
Section
DEFAULT
DEFAULT
00h
00h