emc166sp16k Emlsi Inc., emc166sp16k Datasheet - Page 20

• Manufacturer Part Number: emc166sp16k
• Description: 1mx16 Bit Cellularram
• Manufacturer: Emlsi Inc.

Figure 13: Register READ, Synchronous Mode, Followed by READ ARRAY Operation (WE# HIGH)
Note:
1. Non-default BCR settings for synchronous mode register READ followed by READ ARRAY operation: Latency code 2 (3 clocks);
2. A[19:18] = 00b to read RCR, 10b to read BCR, and 01b to read DIDR.
3. CE# must remain LOW to complete a burst-of-one READ. WAIT must be monitored; additional WAIT cycles caused by refresh collisions require
a corresponding number of additional CE# LOW cycles.
WAIT active LOW; WAIT asserted during delay.
(except A[19:18])
A[19:18]
LB#/UB#
DQ[15:0]
A[19:0]
ADV#
WAIT
WE#
CLK
CRE
OE#
CE#
2
Latch control register value
High-Z
t
CSP
t
t
CW
t
t
SP
SP
SP
t
t
t
HD
HD
HD
t
SP
t
ABA
Latch control register address
t
Note 3
OLZ
t
BOE
CR Valid
t
ACLK
20
t
HD
t
KOH
t
OHZ
t
HZ
t
CBPH
High-Z
Address
Address
Don’t Care
EMC166SP16K
1Mx16 CellularRAM
Undefined
Data
Valid