w83795g Winbond Electronics Corp America, w83795g Datasheet - Page 51
w83795g
Manufacturer Part Number
w83795g
Description
Nuvoton H/w Monitor
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83795G.pdf
(154 pages)
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8.6.1.2.
Status register can be read by interrupt or real-time mode and the function selected by SMI control
register CR40.Bit7.
If status register is read by interrupt mode and SMI control register CR40.Bit7 is set as 0 (Default).
Then a one represents corresponding channel have been exceed its limit. Status registers will clear the
interrupt flag.
If status register is read by real-time mode and SMI control register CR40.Bit7 is set as 1. Then status
registers show whether the values of related channels exceed the limit or not at the polling moment.
The returning of 1 indicates the limit of related channel defined in limit registers has been exceeded.
Location:
BIT
1
0
SMI STS1 - Bank 0 Address 41
SMI STS2 - Bank 0 Address 42
SMI STS3 - Bank 0 Address 43
SMI STS4 - Bank 0 Address 44
SMI STS5 - Bank 0 Address 45
SMI STS6 - Bank 0 Address 46
SMI STS7 - Bank 0 Address 47
SMI Status Register (SMI STS)
for generating the next IRQ/SMI# pulse.
EN_SMI.
0 = disable SMI# signal output. (Default)
1 = enable SMI# signal output.
SMI_POL.
0 = Default polarity.
1 = Polarity inverted.
Twarning-hysteresis
Tcrit-hysteresis
Twarning
Tcritical
Two-Time Intrrupt Mode
** : Interrupt Status is read
Note: It can be programmed to be as not necessary to
read the status for generating the next SMI# pulse by
setting TEMP_SMI_MD = 2'b11.
SMI#
HEX
HEX
HEX
HEX
HEX
HEX
HEX
**
- 51 –
DESCRIPTION
**
**
W83795G/ADG
**
Revision 1.41
Aug/2/2010
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