lm8850urx National Semiconductor Corporation, lm8850urx Datasheet - Page 10

• Manufacturer Part Number: lm8850urx
• Description: High-performance, Step-up Dc-dc Converter For High- Power Applications In Mobile Devices
• Manufacturer: National Semiconductor Corporation

www.national.com
Operation Description
LM8850 FUNCTIONALITY
The LM8850, a high-efficiency, step-up DC-DC switching
boost converter, delivers a constant voltage from a stable DC
input voltage source. Using a voltage mode architecture with
synchronous rectification, the LM8850 has the ability to de-
liver up to 600 mA of load current, depending on the input
voltage, output voltage, ambient temperature, and the induc-
tor chosen.
There are three modes of operation depending on the current
required - PWM (Pulse Width Modulation), PFM (Pulse Fre-
quency Modulation), and shutdown. The device operates in
PWM mode at load currents of approximately 200 mA or high-
er. Lighter output current loads cause the device to automat-
ically switch into PFM for reduced current consumption (I
6µA typ). Shutdown mode turns off the voltage regulation and
offers the lowest current consumption (I
typ).
Once enabled, the LM8850 charges the supercapacitor uti-
lizing all of the default settings in the registers. The I
be used to change the default settings and this can only be
done with the LM8850 enabled. Once a register is written to,
the changes will transition immediately. Every time the EN pin
transitions from VIL to VIH, registers 0 and 1 are reset to their
defaults settings and any settings need to be rewritten into the
appropriate registers.
AUTO MODE
The LM8850 utilizes AUTO mode to reduce the amount of
energy required to maintain the regulated output voltage un-
der light load conditions. The transition from Auto mode to
PWM mode varies depending on input voltage and output
voltage. For an output voltage of 5.0V and an input voltage of
3.6V, the transition will occur around 225 mA.
Auto mode can only be used with a supercapacitor. If no su-
percapacitor is being used in the circuit, Auto-Mode must be
disabled via I
V
The ripple voltage used in Auto-Mode is programmable via
I
mV. The larger the ripple voltage, the more constant energy
will be supplied by the supercapacitor. The regulator will re-
main asleep until the effective energy to reduce the
supercapacitor’s voltage by the ripple value has been used
by the load.
POWER GOOD
The Power Good signal is both an output and a read only
register bit. The Power Good signal will have a V
the V
2
RIPPLE
C. The ripple voltage can be set to 50, 100, 200 and 250
OUT
is greater than 85% of its programmed value. This
2
C.
SHUTDOWN
OH
I
= 0.4 µA
2
2
C Signals: Data Validity
value if
C must
q
=
10
is a typical value for 5.0V and 3.6V V
vary based on input and output voltage.
PROGRAMMABLE V
The output voltage of the LM8850 can be programmed via
I
and 5.7V. The only requirement is that the input voltage must
remain 10% below the desired output voltage for it to remain
in regulation. The output voltage can be changed while the
part is enabled and regulating. The transition time will depend
on load conditions.
TURN-ON TIME
The LM8850 has four programmable turn time values, 5, 7.5,
10, and 12.5 seconds. During the turn on time, the LM8850 is
ramping to the output voltage while limiting the inrush current
which charges the supercapacitor.
BALANCING CIRCUIT
The LM8850 has an internal balancing circuit that helps main-
tain voltage balance between the two capacitors within the
super capacitor. The BAL pin regulates a voltage of VOUT/ 2
between the two capacitors. If one capacitor is overcharged
or less charged, the LM8850 will use the balancing circuit to
correct this charge inbalance. The balancing circuit can be
turned off/on via the I
Reg01, bit 3). The balancing circuit also has the ability to stay
ON even after the LM8850 is shutting down (BAL – Control
Reg00, bit 4).
I
Control of LM8850 is done via I
includes switch over from AUTO to PWM mode, adjustment
of current limit, output voltage, PFM Hysteresis voltage, and
start-up time. The I
voltage balance circuit ON during shutdown. Additionally,
there is a flag bit that reads back PGOOD condition.
I
In I
and the SDA pin is used for the I
need a pull-up resistor according to I
values of the pull-up resistors are determined by the capaci-
tance of the bus. See I
details. Signal timing specifications are according to the I
bus specification. Maximum frequency is 400 kHz or 3.4 MHz
if in High-Speed Mode.
I
The data on SDA line must be stable during the HIGH period
of the clock signal (SCL). In other words, state of the data line
can only be changed when CLK is LOW.
2
2
2
2
C to any of 8 different values: 3.6, 3.9, 4.2, 4.5, 4.7, 5.0, 5.3,
C SIGNALS
C DATA VALIDITY
C Interface
2
C-compatible mode, the SCL pin is used for the I
2
C interface can also switch the active
OUT
2
C specification from Philips for further
30113215
2
C registers (BALMODE – Control
2
C compatible interface. This
2
C data. Both these signals
IN
. The typical value will
2
C specification. The
2
C clock
2
C