tc9404fng TOSHIBA Semiconductor CORPORATION, tc9404fng Datasheet - Page 9

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tc9404fng

Manufacturer Part Number
tc9404fng
Description
Modulation System Da Converter With Analog Filter
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Part Number:
TC9404FNG
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9-2
Serial Mode (
Pins 18, 19 and 20 are used as the command input pins shown in the table below when in the serial
mode.
signal rising edge. It is consequently necessary for the data input from the ATT pin on the shift signal
rising edge to be valid as indicated in the timing example in Figure 10. It is also necessary for the
LATCH pulse to rise at least 1.5 µ s after the final clock rising edge input from the SHIFT pin.
Operating the shift clock with LATCH low destabilizes the internal state, which may lead to
malfunctions, so it must therefore be set to the low level after loading D7 to the register.
Figure 10 Example of Data Setting Timing in the Serial Mode
It is possible to make the various settings with a microcontroller when in the serial mode.
The LATCH signals and ATT signals are loaded to the LSI internal shift registers on the SHIFT
Ensure that all control bits are set when the power supply is turned on.
A = 1.5 µs or higher, B = 1.5 µs or higher
The various control settings when in the serial mode are shown in the table below.
Pin No.
18
19
20
P/
Table 4 Pin Names at The Serial Mode
S
Table 5 Serial Mode Control Settings
Pin Name
LATCH
SHIFT
= “L”: microcontroller setting mode)
AT0~6: Attenuation level setting
µBS: De-emphasis mode select
µEMP: De-emphasis ON/OFF switch
ATT
Serial Input Data
Data latch signal input pin
Shift clock signal input pin
Data input pin
D7
D6
D5
D4
D3
D2
D1
D0
9
AT6
AT5
AT4
AT3
AT2
AT1
AT0
Control Signal
0
Function
µEMP
µBS
1
TC9404FNG
2006-04-27

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