tc9446f TOSHIBA Semiconductor CORPORATION, tc9446f Datasheet - Page 25

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tc9446f

Manufacturer Part Number
tc9446f
Description
Audio Digital Processor For Decode Of Dolby Digital Ac-3 , Mpeg2 Audio -
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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chosen.
correspond a maximum of 75 MIPS. The clock outputted from DLL circuit should choose a crystal
oscillation clock to be set to less than 150 MHz. The example of DLL clock by the crystal oscillation clock is
shown in Table 6.
FI3 terminal should fix each terminal to “H”, or since pull-up resistance is built in, when not being
specified by the program, please it be open and be used for it.
programs. IRQ terminal should fix a terminal to “L”, or since pull down resistance is built in, when not
being specified by the program, please it be open and be used for it.
flag and the MCU for detection of internal operation, or the external LSI. However, the function and
operation of a terminal change with built-in programs. Since PO0-PO7 terminal contains pull-up resistance,
when not being specified by the program, please carry out and use each output terminal for opening.
“L” level will be outputted if it initializes with a reset terminal.
DLL oscillation clock can be chosen with DLCKS terminal and DLON terminal, as shown in Table 5.
When DLCKS terminal and DLON terminal are “L”, the external clock input from SCKI terminal is
An internal clock of operation is a half divided clock of the DLL clock, and processing speed can
It is used when inputting a flag from a MCU. However, a function changes with built-in programs. FI0 to
It is used when interrupting and inputting from a MCU. However, operation changes with built-in
It can be used when carrying out logic control of the case where it is used as an interruption output to the
At the time of a power-supply injection, the output of a general-purpose output terminal becomes unfixed.
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