lnbeh21 STMicroelectronics, lnbeh21 Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
lnbeh21
Manufacturer Part Number
lnbeh21
Description
Lnb Supply And Control Ic With Step-up Converter And Ic Interface
Manufacturer
STMicroelectronics
Datasheet
1.LNBEH21.pdf
(22 pages)
APPLICATION INFORMATION
This IC has a built in DC/DC Step-Up controller that, from a single supply source ranging from 8 to 15V,
generates the input voltages (V
of 1.65W typ. @ 750mA load (the linear regulator drop voltage is internally kept at: V
An UnderVoltage Lockout circuit will disable the whole circuit when the supplied V
threshold (6.7V typically).
All the functions of this IC are controlled via I
bits). The same register can be read back, and two bits will report the diagnostic status. When the IC is put
in Stand-by (EN bit LOW), the power blocks are disabled.
The LNBEH21 is compliant both with the DiSEqC
Communication Mode. The communication mode is selected by the “OM” I
OM bit status, the TEN/VSEL pin function (see block diagram) is switched to control the 13/18V output
voltage level or to enable the internal 22KHz tone generator when in DiSEqC mode. (refer to
Communication Mode section for details).
When the regulator blocks are active (EN bit = 1) and in DiSEqC mode (OM=0), the LNB output voltage
can also be logic controlled to select 13V or 19.5V by mean of the V
the V
Communication (see Communication Mode section). Additionally, it is possible to increment by 1V (Typ.)
the selected output voltage value to compensate the excess voltage drop along the coaxial cable using
the LLC SR bit (LLC=1).
In order to improve design flexibility and to allow implementation of newcoming LNB remote control
standards, an analogic modulation input pin is available (EXTM). An appropriate DC blocking capacitor
must be used to couple the modulating signal source to the EXTM pin. Also in this case, the V
must be set ON during the tone transmission by setting the TTX bit High. When the external modulation
is not used, the relevant pin can be left open.
The current limitation block is SOA type and it is possible to select two current limit thresholds, by the
dedicated ISEL pin. The higher threshold is in the range of 750mA to 1A if the ISEL is left floating or
connected a voltage >3.3V. The lower threshold is in the range of 450mA to 700mA when the ISEL pin is
connected to ground. When the output port is shorted to ground, the SOA current limitation block limits the
short circuit current (I
set the Short Circuit Current protection either statically (simple current clamp) or dynamically by the PCL
bit of the I
circuit works dynamically, as soon as an overload is detected, the output is shut-down for a time T
typically 900ms. Simultaneously the OLF bit of the System Register is set to HIGH. After this time has
elapsed, the output is resumed for a time T
detected, the protection circuit will cycle again through T
overload is detected, normal operation is resumed and the OLF bit is reset to LOW. Typical T
time is 990ms and it is determined by an internal timer. This dynamic operation can greatly reduce the
power dissipation in short circuit condition, still ensuring excellent power-on start up in most conditions.
However, there could be some cases in which an highly capacitive load on the output may cause a difficult
start-up when the dynamic protection is chosen. This can be solved by initiating any power start-up in
static mode (PCL=HIGH) and then switching to the dynamic mode (PCL=LOW) after a chosen amount of
time. When in static mode, the OLF bit goes HIGH when the current clamp limit is reached and returns
LOW when the overload condition is cleared.
This IC is also protected against overheating: when the junction temperature exceeds 150°C (typ.), the
step-up converter and the linear regulator are shut off, and the OTF SR bit is set to HIGH. Normal
operation is resumed and the OTF bit is reset to LOW when the junction is cooled down to 135°C (typ.).
(*): External components are needed to comply to bi-directional DiSEqC
cation with DiSEqC
I
Data transmission from main µP to the LNBEH21 and vice versa takes place through the 2 wires I
interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be
externally connected).
2
C BUS INTERFACE
UP
voltage level depends on the OM bit status in order to allow the 13/18V Control Word
2
C SR; when the PCL (Pulsed Current Limiting) bit is set to LOW, the overcurrent protection
TM
specifications is not implied by the use of this IC.
SC
) at typically 300mA, to reduce the power dissipation. Moreover, it is possible to
UP
) that let the linear post-regulator to work at a minimum dissipated power
ON
2
=1/10T
C
TM
TM
bus by writing 6 bits on the System Register (SR, 8
2.0 specification and with the 13/18V Control Word
OFF
TM
OFF
bus hardware requirements. Full compliance of the whole appli-
(typ.). At the end of Ton, if the overload is still
and T
ON
OM
. At the end of a full T
bit. The control of the V
2
C
TM
bit and, depending on the
CC
UP
drops below a fixed
-V
OUT
ON
LNBEH21
=2.2V typ.).
in which no
O
TX output
OM
ON
2
+T
C bus
bit on
OFF
5/22
OFF
,