attiny13-20ss ATMEL Corporation, attiny13-20ss Datasheet - Page 108

• Manufacturer Part Number: attiny13-20ss
• Description: 8-bit Microcontroller With 1k Bytes In-system Programmable Flash - Atmel Corporation
• Manufacturer: ATMEL Corporation

Serial Programming
Algorithm
108
ATtiny13
When writing serial data to the ATtiny13, data is clocked on the rising edge of SCK.
When reading data from the ATtiny13, data is clocked on the falling edge of SCK. See
Figure 55 and Figure 56 for timing details.
To program and verify the ATtiny13 in the Serial Programming mode, the following
sequence is recommended (see four byte instruction formats in Table 50):
1. Power-up sequence:
2. Wait for at least 20 ms and enable serial programming by sending the Program-
3. The serial programming instructions will not work if the communication is out of
4. The Flash is programmed one page at a time. The memory page is loaded one
5. A: The EEPROM array is programmed one byte at a time by supplying the
6. Any memory location can be verified by using the Read instruction which returns
7. At the end of the programming session, RESET can be set high to commence
8. Power-off sequence (if needed):
Apply power between V
some systems, the programmer can not guarantee that SCK is held low during
power-up. In this case, RESET must be given a positive pulse of at least two
CPU clock cycles duration after SCK has been set to “0”.
ming Enable serial instruction to pin MOSI.
synchronization. When in sync. the second byte (0x53), will echo back when
issuing the third byte of the Programming Enable instruction. Whether the echo
is correct or not, all four bytes of the instruction must be transmitted. If the 0x53
did not echo back, give RESET a positive pulse and issue a new Programming
Enable command.
byte at a time by supplying the 4 LSB of the address and data together with the
Load Program memory Page instruction. To ensure correct loading of the page,
the data low byte must be loaded before data high byte is applied for a given
address. The Program memory Page is stored by loading the Write Program
memory Page instruction with the 5 MSB of the address. If polling (
not used, the user must wait at least t
Table 49.) Accessing the serial programming interface before the Flash write
operation completes can result in incorrect programming.
address and data together with the appropriate Write instruction. An EEPROM
memory location is first automatically erased before new data is written. If polling
(
next byte. (See Table 49.) In a chip erased device, no 0xFFs in the data file(s)
need to be programmed.
B: The EEPROM array is programmed one page at a time. The Memory page is
loaded one byte at a time by supplying the 2 LSB of the address and data
together with the Load EEPROM Memory Page instruction. The EEPROM Mem-
ory Page is stored by loading the Write EEPROM Memory Page Instruction with
the 4 MSB of the address. When using EEPROM page access only byte loca-
tions loaded with the Load EEPROM Memory Page instruction is altered. The
remaining locations remain unchanged. If polling (
must wait at least t
chip erased device, no 0xFF in the data file(s) need to be programmed.
the content at the selected address at serial output MISO.
normal operation.
Set RESET to “1”.
Turn V
RDY/BSY
CC
) is not used, the user must wait at least t
power off.
WD_EEPROM
CC
and GND while RESET and SCK are set to “0”. In
before issuing the next page (See Table 47). In a
WD_FLASH
before issuing the next page. (See
RDY/BSY
WD_EEPROM
) is not used, the used
before issuing the
RDY/BSY
2535G–AVR–01/07
) is