pic24hj16gp304 Microchip Technology Inc., pic24hj16gp304 Datasheet - Page 43

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pic24hj16gp304

Manufacturer Part Number
pic24hj16gp304
Description
High-performance, 16-bit Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet

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4.0
The PIC24HJ32GP202/204 and PIC24HJ16GP304
devices contain internal Flash program memory to
store and execute application code. The memory is
readable, writable and erasable during normal opera-
tion over the entire V
Flash memory can be programmed in two ways:
• In-Circuit Serial Programming™ (ICSP™)
• Run-Time Self-Programming (RTSP)
ICSP
PIC24HJ16GP304 device to be serially programmed
while in the end application circuit. This is done with
two lines for programming clock and programming data
(one of the alternate programming pin pairs: PGC1/
PGD1, PGC2/PGD2 or PGC3/PGD3), and three other
lines for power (V
(MCLR). This allows customers to manufacture boards
with unprogrammed devices and then program the
microcontroller just before shipping the product. This
also allows the most recent firmware or a custom firm-
ware to be programmed.
FIGURE 4-1:
© 2007 Microchip Technology Inc.
Note:
programming capability
allows
FLASH PROGRAM MEMORY
This data sheet summarizes the features
of
PIC24HJ16GP304 devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “PIC24H
Family Reference Manual”.
PIC24HJ32GP202/204 and PIC24HJ16GP304
the
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
DD
a
), ground (V
DD
ADDRESSING FOR TABLE REGISTERS
PIC24HJ32GP202/204
PIC24HJ32GP202/204
range.
SS
) and Master Clear
1/0
0
TBLPAG Reg
8 bits
and
and
Preliminary
Program Counter
24-bit EA
24 bits
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
application can write program memory data either in
‘blocks’ or ‘rows’ of 64 instructions (192 bytes) at a time
or a single program memory word, and erase program
memory in blocks or ‘pages’ of 512 instructions (1536
bytes) at a time.
4.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits <7:0> of the TBLPAG register and
the Effective Address (EA) from a W register specified
in the table instruction, as shown in Figure 4-1.
The TBLRDL and the TBLWTL instructions are used to
read or write to the bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
Table Instructions and Flash
Programming
0
Byte
Select
DS70289A-page 41

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