at91m42800 ATMEL Corporation, at91m42800 Datasheet - Page 14

• Manufacturer Part Number: at91m42800
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

System Peripherals
PMC: Power Management Controller
The AT91M42800 Power Management Controller opti-
mizes the power consumption of the device. The PMC
controls the clocking elements such as the oscillator and
the PLLs, and the System and the Peripheral Clocks. It
also controls the MCKO pin and permits to the user to
select four different signals to be driven on this pin.
The AT91M42800 has the following clock elements:
• The oscillator providing a clock that depends on the
• PLL A providing a low to middle frequency clock range
• PLL B providing a middle to high frequency range
• The Clock prescaler
• The ARM Processor Clock Controller
• The Peripheral Clock Controller
• The Master Clock Output Controller
The on-chip low-power oscillator together with the PLL-
based frequency multiplier and the prescaler results in a
programmable clock between 500 Hz and 66 MHz. It is the
responsibility of the user to make sure that the PMC pro-
gramming does not result in a clock over the acceptable
limits.
ST: System Timer
The System Timer module integrates three different free-
running timers:
• A Period Interval Timer setting the base time for an
• A Watchdog Timer that is built around a 16-bit counter,
• A Real-Time Timer counting elapsed seconds
These timers count forwards or backwards using a Slow
Clock provided by the MCU. Typically, this clock has a fre-
quency of 32768 kHz.
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crystal fundamental frequency connected between the
XIN and XOUT pins
Operating System
and is used to prevent system lock-up if the software
becomes trapped in a deadlock. It can generate an
internal reset or interrupt, or assert an active level on the
dedicated pin NWDOVF.
AT91M42800
AIC: Advanced Interrupt Controller
The AT91M42800 has an 8-level priority, individually
maskable, vectored interrupt controller. This feature sub-
stantially reduces the software and real-time overhead in
handling internal and external interrupts.
The interrupt controller is connected to the NFIQ (fast inter-
rupt request) and the NIRQ (standard interrupt request)
inputs of the ARM7TDMI processor. The processor’s NFIQ
line can only be asserted by the external fast interrupt
request input: FIQ. The NIRQ line can be asserted by the
interrupts generated by the on-chip peripherals and the
external interrupt request lines: IRQ0 to IRQ3.
The 8-level priority encoder allows the customer to define
the priority between the different NIRQ interrupt sources.
Internal sources are programmed to be level sensitive or
edge triggered. External sources can be programmed to be
positive or negative edge triggered or high or low level
sensitive.
PIO: Parallel I/O Controller
The AT91M42800 has 54 programmable I/O lines. I/O lines
are multiplexed with an external signal of a peripheral to
optimize the use of available package pins. These lines are
controlled by two separate and identical PIO Controllers
called PIOA and PIOB. Each PIO controller also provides
an internal interrupt signal to the Advanced Interrupt Con-
troller and insertion of a simple input glitch filter on any of
the PIO pins.
SF: Special Function
The AT91M42800 provides registers that implement the
following special functions.
• Chip Identification
• RESET Status