lpc12d27 NXP Semiconductors, lpc12d27 Datasheet
lpc12d27
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lpc12d27 Summary of contents
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... LCD driver provides 40 segments and supports from one to four backplanes. Display overhead is minimized by an on-chip display RAM with auto-increment addressing. The LPC12D27 operate at CPU frequencies MHz and include 128 kB of flash memory and data memory. The peripheral complement of the LPC1227 microcontroller includes a micro DMA controller, one Fast-mode Plus I purpose timers, a 10-bit ADC, two comparators, and general purpose I/O pins ...
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... Available as 100-pin LQFP package. LPC12D27 Product data sheet 2 C-bus interface supporting full I All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller 2 C-bus specification and Fast-mode Plus with a 2 C-bus © NXP B.V. 2011. All rights reserved. ...
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... Alarm systems 4. Ordering information Table 1. Ordering information Type number Package Name LPC12D27FBD100/301 LQFP100 4.1 Ordering options Table 2. Ordering options for LPC12D27 Type number Flash LPC12D27FBD100/301 128 kB LPC12D27 Product data sheet Description plastic low profile quad flat package; 100 leads; body 14 14 1.4 mm SOT407-1 2 ...
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... NXP Semiconductors 5. Block diagram PIO0, PIO1, PIO2 Fig 1. LPC12D27 Product data sheet LPC1227 MCU LPC12D27 block diagram All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller PCF8576D LCD CONTROLLER 002aaf672 © NXP B.V. 2011. All rights reserved. ...
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... DTR0, DSR0, CTS0, DCD0, RI0, RTS0 RXD1 TXD1 SCL SDA 4 x MAT 32-bit COUNTER/TIMER 0 CAP 2 x MAT 16-bit COUNTER/TIMER 0 CAP Fig 2. LPC12D27 block diagram (microcontroller) LPC12D27 Product data sheet SWD INTERFACE ARM MICRO DMA CONTROLLER system master bus AHB-LITE BUS HIGH-SPEED ...
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... TIMEBASE POWER-ON COMMAND RESET DECODER 2 I C-BUS CONTROLLER All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller S0 to S39 40 DISPLAY SEGMENT OUTPUTS DISPLAY REGISTER OUTPUT BANK SELECT AND BLINK CONTROL DISPLAY RAM 40 x 4-BIT ...
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... PIO0_14 PIO0_15 22 PIO0_16 23 PIO0_17 24 25 PIO0_18 Fig 4. Pin configuration LQFP100 package LPC12D27 Product data sheet LPC12D27 All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller ...
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... IOCONFIG block. The multiplexed functions include the counter/timer inputs and outputs, the UART receive, transmit, and control functions, and the serial wire debug functions. For each pin, the default function is listed first together with the pin’s reset state. Table 3. LPC12D27 LQFP100 pin description Symbol Pin Microcontroller pins ...
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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin [2] PIO0_6/RI0/ 12 CT32B1_CAP0/ CT32B1_MAT0 [2] PIO0_7/CTS0/ 13 CT32B1_CAP1/ CT32B1_MAT1 [2] PIO0_8/RXD1 14 /CT32B1_CAP2/ CT32B1_MAT2 [2] PIO0_9/TXD1/ 15 CT32B1_CAP3/ CT32B1_MAT3 [3] PIO0_10/SCL 17 [3] PIO0_11/SDA/ 18 CT16B0_CAP0/ CT16B0_MAT0 [7] PIO0_12/CLKOUT/ 19 CT16B0_CAP1/ CT16B0_MAT1 [4] RESET/PIO0_13 20 [2] PIO0_14/SCK 21 LPC12D27 Product data sheet …continued Start Reset Type Description ...
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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin [2] PIO0_15/SSEL/ 22 CT16B1_CAP0/ CT16B1_MAT0 [2] PIO0_16/MISO/ 23 CT16B1_CAP1/ CT16B1_MAT1 [2] PIO0_17/MOSI 24 [2] PIO0_18/SWCLK/ 25 CT32B0_CAP0/ CT32B0_MAT0 [5] PIO0_19/ACMP0_I0/ 95 CT32B0_CAP1/ CT32B0_MAT1 [5] PIO0_20/ACMP0_I1/ 96 CT32B0_CAP2/ CT32B0_MAT2 [5] PIO0_21/ACMP0_I2/ 97 CT32B0_CAP3/ CT32B0_MAT3 [5] PIO0_22/ACMP0_I3 98 [5] PIO0_23/ 99 ACMP1_I0/ CT32B1_CAP0/ CT32B1_MAT0 PIO0_24/ACMP1_I1/ 100 [5] CT32B1_CAP1/ CT32B1_MAT1 LPC12D27 Product data sheet … ...
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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin [5] SWDIO/ACMP1_I2/ 1 CT32B1_CAP2/ CT32B1_MAT2/PIO0_25 [5] SWCLK/ 2 ACMP1_I3/ CT32B1_CAP3/ CT32B1_MAT3/PIO0_26 [7] PIO0_27/ACMP0_O 3 [7] PIO0_28/ACMP1_O/ 4 CT16B0_CAP0/ CT16B0_MAT0 [7] PIO0_29/ROSC/ 5 CT16B0_CAP1/ CT16B0_MAT1 [5] R/PIO0_30/AD0 26 [5] R/PIO0_31/AD1 27 PIO1_0 to PIO1_6 [5] R/PIO1_0/AD2 28 LPC12D27 Product data sheet …continued Start Reset Type Description logic state ...
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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin [5] R/PIO1_1/AD3 80 [5] PIO1_2/SWDIO/AD4 81 [6] PIO1_3/AD5/WAKEUP 82 [5] PIO1_4/AD6 83 [5] PIO1_5/AD7/ 84 CT16B1_CAP0/ CT16B1_MAT0 [2] PIO1_6/CT16B1_CAP1/ 85 CT16B1_MAT1 PIO2_0 [2] PIO2_0/CT16B0_CAP0/ 16 CT16B0_MAT0 RTCXIN 89 RTCXOUT 88 XTALIN 92 XTALOUT 93 VREF_CMP DD(IO DD(3V3 SSIO LCD display pins ...
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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin S10 56 S11 57 S12 58 S13 59 S14 60 S15 61 S16 62 S17 63 S18 64 S19 65 S20 66 S21 67 S22 68 S23 69 S24 70 S25 71 S26 72 S27 73 S28 74 S29 75 S30 76 S31 77 S32 78 S33 ...
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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin BP1 44 BP2 43 BP3 45 LCD_SDA 35 LCD_SCL 36 SYNC 37 CLK SS(LCD LCD [1] Pin state at reset for default function Input Output internal pull-up enabled inactive, no pull-up/down enabled. [2] Digital I/O pin; default: pull-up enabled, no hysteresis. ...
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... C-bus interface is initialized the internal oscillator is used, the output from pin CLK can be SS(LCD) All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller 14-segment Dot matrix/Elements 160 (4 40) 10 120 (3 40 ...
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... Product data sheet ) is a fixed division of the clock frequency ( /24. fr clk All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller ) from either the internal or an clk © NXP B.V. 2011. All rights reserved ...
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... DD I (1. < 125 based on package heat transfer, not device power consumption human body model; all pins All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller Min Max 3.0 3.6 3.0 3.6 0.5 [2] +3.6 0 5.5 [3] - 100 [3] ...
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... LQFP64 package LQFP48 package JEDEC test board LQFP64 package LQFP48 package All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller (C), can be calculated using the following j and V . The I/O power dissipation ...
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... V = 3.3 V; DD(3V3 C T amb DD(IO DD(IO) [2][3][4] pin configured to provide a digital function output active All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller [1] Min Typ Max 3.0 3.3 3.6 3.0 3.3 3 ...
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... 28 mA high mode low mode high mode All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller [1] Min Typ - - - 0.4 DD(IO) 0.4 V ...
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... OLS DD(IO pins PIO0_10 and PIO0_11 see Section 12.1 is grounded. DD(IO) All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller [1] Min Typ Max [ 50 80 100 ...
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... Peripheral power consumption Typical current consumption I Frequency 24 MHz independent system oscillator + PLL 0.29 - 1.87 - 0. 0.05 - 1.86 - 0.04 0.09 0.09 0.08 0.08 - 0.34 - 0.34 - 0.36 - 0.09 - 0.09 - 0.10 - 0.30 - 0.52 - 0.52 - 0.18 - 0.06 All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller = 25 C and amb MHz IRC + PLL system oscillator - - - - - - - - 0.05 0.03 1.85 1.61 0.04 0.02 0.09 0.04 0.09 0.04 0.08 0.04 0.08 0.04 0.34 0.17 0.34 0.17 0.37 0.18 0.09 0.05 0.10 0.05 0.10 0.05 0.29 0.15 0.51 0.26 0.51 ...
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... SYSAHBCLKCTRL register; all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled. Active mode: Typical supply current I clock frequencies (peripherals disabled) All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller 3.4 V DD(3V3) while(1){} ...
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... V; active mode entered executing code DD(3V3) peripherals enabled in the SYSAHBCLKCTRL register. Active mode: Typical supply current I clock frequencies (peripherals enabled) All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller 3.4 V DD(3V3) while(1){} versus supply voltage V ...
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... Conditions: BOD disabled; all oscillators and analog blocks disabled in the PDSLEEPCFG register supply voltages V DD(3V3) All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller 3.4 V DD(3V3) versus supply voltage temperature (°C) ...
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... Conditions 3.3 V DD(IO) current I OH All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller temperature (°C) versus temperature for DD low mode -40 °C +25 °C +70 °C +85 ° (mA) ...
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... Conditions 3.3 V. DD(IO) 2 C-bus pins (high current sink): Typical LOW-level output voltage V LOW-level output current I OL All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller 002aag310 high mode -40 °C +25 °C +70 °C +85 ° (mA) ...
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... Conditions 3.3 V. DD(IO) output source current I OH All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller 002aag181 high mode -40 °C +25 °C +70 °C +85 ° (mA) OL versus LOW-level output OL 002aag182 -40 ° ...
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... Conditions 3.3 V. DD(IO) versus input voltage V pu All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller 002aag185 (mA © NXP B.V. 2011. All rights reserved ...
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... C; maximum sampling frequency f depends on the sampling frequency fs All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller [1] Min Typ 0 - ...
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... LSB (ideal (LSB ) IA ideal ). D ). All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller (1) 1018 1019 1020 1021 1022 1023 − DD(3V3 LSB = 1024 offset gain error error ...
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... All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller Min Typ Max - ...
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... V 1 Figure 19 400 mV 0 400 mV at start of power- Condition: 0 < All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller Min Typ 400 mV [ [1][ ...
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... Conditions oscillator frequency clock cycle time clock HIGH time clock LOW time clock rise time clock fall time t CHCL All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller Min Max [ [1] 162 [ ...
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... Dynamic characteristics: Watchdog oscillator Conditions internal oscillator DIVSEL = 0x1F, FREQSEL = 0x1 frequency in the WDTOSCCTRL register; DIVSEL = 0x00, FREQSEL = 0xF in the WDTOSCCTRL register All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller [1] Conditions Min Typ - 11. MHz + 1% 12 MHz − ...
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... Standard-mode 0 Fast-mode Fast-mode Plus 0 [8][9] Standard-mode 250 Fast-mode Fast-mode Plus C-bus system but the requirement t All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller Min Max 100 0 400 1 - 300 20 + 0.1 C 300 b - 120 - 1 ...
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... C-bus pins clock timing LPC12D27 Product data sheet t SU;DAT HD;DAT LOW All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller t VD;DAT t HIGH © NXP B.V. 2011. All rights reserved. 002aaf425 ...
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... PCB layout. LPC12D27 Product data sheet which attenuates the input voltage by a factor C g LPC1xxx XTALIN C i 100 pF x1 All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller /( 002aae788 ,C , and ...
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... MHz - 1 GHz 16.4 [ 4.8 150 kHz - 30 MHz 30 MHz - 150 MHz 6.9 150 MHz - 1 GHz 16.3 [ All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller Table 17. 24 MHz 33 MHz 3.8 6.4 5.4 9 20.1 23 4 6.6 5 ...
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... 0.27 0.20 14.1 14.1 16.25 16.25 0.5 0.17 0.09 13.9 13.9 15.75 15.75 REFERENCES JEDEC JEITA MS-026 All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller detail 0.75 1.15 1 0.2 0.08 0.08 0.45 0.85 EUROPEAN PROJECTION SOT407-1 ...
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... Refer to the package outline drawing for actual layout 1.500 0.280 0.400 14.500 14.500 17.550 17.550 All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller © NXP B.V. 2011. All rights reserved. SOT407-1 sot407-1 ...
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... NXP Semiconductors 15. References [1] LPC122x data sheet, [2] PCF8576D data sheet, LPC12D27 Product data sheet http://www.nxp.com/microcontrollers http://www.nxp.com/microcontrollers All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller © NXP B.V. 2011. All rights reserved ...
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... NXP Semiconductors 16. Revision history Table 18. Revision history Document ID Release date LPC12D27 v.1 20110920 LPC12D27 Product data sheet Data sheet status Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller Change notice ...
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... Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller © NXP B.V. 2011. All rights reserved ...
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... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller © NXP B.V. 2011. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com LPC12D27 All rights reserved. Date of release: 20 September 2011 Document identifier: LPC12D27 ...