p87c51mc2 NXP Semiconductors, p87c51mc2 Datasheet - Page 19

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p87c51mc2

Manufacturer Part Number
p87c51mc2
Description
80c51 8-bit Microcontroller Family With Extended Memory
Manufacturer
NXP Semiconductors
Datasheet

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DC ELECTRICAL CHARACTERISTICS
V
T
Notes:
1. Typical ratings are not guaranteed. The values listed are at room temperature (+25°C), 5V, unless otherwise stated.
2. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the V
3. Capacitive loading on ports 0 and 2 may cause the V
4. Pins of ports 1, 2, 3 and 4 source a transition current when they are being externally driven from 1 to 0. The transition current
5. See Figures 13 through 16 for I
6. This value applies to T
2001 Apr 06
Philips Semiconductors
SYMBOL
amb
DD
80C51 8-bit microcontroller family with extended memory
64KB/96KB OTP with 2KB/3KB RAM
V
R
V
The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0
transitions during bus operations. In the worst cases (capacitive loading>100 pF), the noise pulse on the ALE pin may exceed
0.8 V. In such cases, it may be desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger
STROBE input. I
outputs exceed the test conditions.
specification when the address bits are stabilizing.
reaches its maximum value when V
V
V
V
C
V
V
I
I
I
OH1
I
= 2.7V to 5.5V unless otherwise specified;
OL1
CC
RST
IH1
OH
TL
L1
OL
IL
= 0 to +70°C for commercial, unless otherwise specified.
10
IH
IL
Input low voltage
Input high voltage (ports 0, 1, 2, 3,
4, EA)
Input high voltage, XTAL1, RST
Output low voltage, ports 1, 2, 3, 4
Output low voltage, port 0, ALE,
PSEN
Output high voltage, ports 1, 2, 3, 4
Output high voltage (port 0 in
external bus mode), ALE
Logical 0 input current, ports 1, 2,
3, 4
Logical 1 -to-0 transition current,
ports 1, 2, 3, 4
Input leakage current, port 0
Power supply current
Active mode (see Note 5)
Idle mode (see Note 5)
Power-down mode or clock
stopped (see Figure 16 for
conditions)
Internal reset pull-down resistor
Pin capacitance
7,8
OL
PARAMETER
can exceed these conditions provided that no single output sinks more than 5mA and no more than two
8
amb
10
(except EA)
= 0°C to +70°C.
CC
9
, PSEN
test conditions. f
IN
is approximately 2 V for 4.5V < V
3
8
V
V
V
V
V
V
DD
DD
DD
DD
DD
0.45 < V
TEST CONDITIONS
IN
4.5V < V
= 2.7V, I
= 2.7V, I
= 2.7V, I
= 4.5V, I
= 2.7V, I
= 2.0V, See Note 4
OSC
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
OH
IN
IN
is the oscillator frequency in MHz.
= 0.4V
= 5.5V
= 3.6V
= 5.5V
= 3.6V
= 5.0V
= 5.5V
DD
on ALE and PSEN to momentarily fall below the V
OH
< V
OL
OL
OH
OH
< 5.5V,
19
= -3.2mA
= 1.6mA
= 3.2mA
DD
= -30µA
= -10µA
-0.3
DD
0.2V
< 5.5V.
V
V
0.7V
DD
DD
MIN
-0.5
40
DD
-1
- 0.7
- 0.7
DD
+0.9
P87C51MB2/P87C51MC2
LIMITS
TYP
OL
20
of ALE and ports 1, 3 and 4.
1
2.7 /MHz × f
1.3 /MHz × f
1.3 /MHz × f
1.0 /MHz × f
0.2V
Preliminary specification
V
V
DD
DD
MAX
-650
±10
100
225
0.4
0.4
-75
7 +
4 +
4 +
1 +
15
DD
DD
+0.5
+0.5
-0.1
-0.7V
OSC
OSC
OSC
OSC
UNIT
mA
mA
µA
µA
µA
µA
µA
k
pF
V
V
V
V
V
V
V

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