p87c770aar NXP Semiconductors, p87c770aar Datasheet - Page 59

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p87c770aar

Manufacturer Part Number
p87c770aar
Description
Microcontrollers Ntsc With On-screen Display Closed Caption
Manufacturer
NXP Semiconductors
Datasheet

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18.9.12 C
The Configuration Register is provided for special purposes and to program the delay between the RGB and FBL output.
Table 99 Configuration Register (address 87FFH)
Table 100 Description of CONFR bits
Table 101 FBL delay adjustment
1999 Jun 11
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
PLUS
BIT
CC
7
7
6
5
4
3
2
1
0
0
0
0
1
X
ONFIGURATION
SYMBOL
PLUS
PLUS
ADJ
ADJ
MIN
CC
6
0
0
1
0
X
R
EGISTER
Closed Caption mode. The state of this bit selects the OSD mode or the CC mode.
If CC = 0, then the OSD mode is selected; this is also the default setting. If CC = 1, then
the CC mode is selected. In the CC mode the underline is suppressed during the
display of a serial attribute. The display is then according to the CC specification.
FBL delay select. These 3 bits define the timing of the FBL signal; see Table 101.
Reserved, set to logic 0.
These 3 bits are used for test purposes only and should be set to logic 0s for normal
operation.
ADJ
MIN
(CONFR)
5
0
1
0
0
X
FBL switched to video, not active.
FBL active one pixel early to RGB.
FBL synchronous with RGB (typical setting).
FBL active one pixel delayed to RGB.
All other combinations are allowed and will have the effect that the above
settings are functionally ORed, e.g. ‘111’ will result in a 3 pixel wide FBL
pulse when one single pixel is displayed.
MIN
4
59
3
DESCRIPTION
FBL TIMING
2
P8xCx70 family
1
Product specification
0

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