p87cl884t NXP Semiconductors, p87cl884t Datasheet - Page 23

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p87cl884t

Manufacturer Part Number
p87cl884t
Description
P8xcl883; P8xcl884 Telx Microcontrollers For Ct0 Handset/basestation Applications
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Notes
1. The operating supply current is measured with all output pins disconnected; V
2. The Idle mode supply current is measured with all output pins and RST disconnected; V
3. The Power-down current is measured with all output pins and RST disconnected; V
4. The typical currents are only for the specific block. To calculate the typical power consumption of the microcontroller,
5. Verified on sampling basis.
6. The input threshold voltage of P1.6/SCL and P1.7/SDA meet the I
7. For pin PORENABLE the V
8. Not valid for pins SDA, SCL, RST, MIN and PORENABLE.
9. The maximum allowed load capacitance C
10. The LVD is tested according to the specification in the data sheet “TELX family; Chapter: Low Voltage Detection” .
11. Values are specified for DTMF frequencies only (CEPT CS203).
12. Related to the Low Group Frequency (LGF) component (CEPT CS203).
13. After final testing the value of each EEPROM bit is typically logic 1.
14. Can also be done by two 100 s pulses.
15. C
In-System Programming for the OTP
t
t
t
t
I
ACO (Amplitude Controlled Oscillator)
V
Z
C
prog
ver
Vpp(setup)
Vpp(max)
Vpp
SYMBOL
i(XTAL1)
XTAL1
1i
TELX microcontrollers for CT0
handset/basestation applications
; C
XTAL1 driven with square wave; XTAL2 not connected; fetch of NOP instructions; all derivative blocks disabled.
XTAL1 driven with square wave; XTAL2 not connected; all derivative blocks disabled.
XTAL1 and XTAL2 not connected;.
the current consumption of the CPU must be added. Example: the typical current consumption of the microcontroller
in operating mode with CPU, Watchdog and UART active can be calculated as (1.8 + 0.11 + 0.09) mA = 2.0 mA.
below 0.3V
1i
2i
and C
program cycle time
verify cycle time
program voltage setup time
maximum program voltage time
program voltage current
external clock signal amplitude
peak-to-peak
input impedance on XTAL1
input capacitance on XTAL1 and XTAL2
2i
DD
are the total internal capacitances (including gate capacitance, leadframe capacitance).
will be recognized as a logic 0 and an input voltage above 0.7V
PARAMETER
IL(max)
= 0.1V
DD
L
.
is in this case limited to around 200 pF.
23
cumulative for the
product lifetime
In-System Programming
notes 5 and 15
CONDITIONS
2
C-bus specification. Therefore, an input voltage
DD
IL
P8xCL883; P8xCL884
= V
will be recognized as a logic 1.
90
1
10
500
300
MIN.
SS
IL
= V
; V
IL
IH
SS
= V
100
1000
10
= V
; V
TYP.
SS
IH
Product specification
DD
; V
= V
; RST = V
IH
110
60
40
V
DD
MAX.
= V
DD
;
DD
DD
;
s
mA
mV
k
pF
UNIT
;
s
s
s

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