zlf645e0s2832g ZiLOG Semiconductor, zlf645e0s2832g Datasheet - Page 56

• Manufacturer Part Number: zlf645e0s2832g
• Description: Crimzon Infrared Microcontrollers Zlf645 Series Flash Mcus With Learning Amplification
• Manufacturer: ZiLOG Semiconductor

Table 24. Register Pointer Register (RP)
PS026407-0408
Bit
Field
Reset
R/W
Address
Bit Position
[7:4]
[3:0]
Register Pointer Register
Stack Pointer Register
R/W
0h–Fh
0h–Fh
The upper nibble of the Register Pointer register (see
register group is accessed. A working register group consists of 16 bytes. The lower nibble
selects the expanded register file bank; for ZLF645 MCU, Banks 0, 1, 2, 3, F, and D are
implemented. A
addressed. Any other value from
expanded register bank.
Through a Flash programmable option bit, the Stack Pointer register of the ZLF645 MCU
is either one or two bytes providing either 8-bit or 16-bit of stack addressing. When not
enabled through the option bit for 16-bit stack addressability, the SPH register can be used
as a User Data register (USER). The stack pointer resides in the RAM and when the
ZLF645 MCU is programmed for 8-bit addressing, this stack pointer resides in Bank 0 of
the RAM only. With 16-bit addressing, the entire RAM’s address space is available for use
as the stack.
The stack address is decremented prior to a PUSH operation and incremented after a POP
operation. The stack address always points to the data stored at the ‘top’ of the stack (the
lowest stack address). During a call instruction, the contents of the Program Counter are
saved on the stack. Interrupts cause the contents of the Program Counter and Flags regis-
ters to be saved on the stack. An overflow or underflow can occur when the stack address
is incremented or decremented during normal operations. You must prevent this occur-
rence or unpredictable operations may result (see
Value
7
0
Working Register Group Pointer
Description
Working Register Group Pointer
Determines which 16-byte working group is addressed.
Register Bank Pointer
Determines which bank is active.
R/W
6
0
0h
in the lower nibble allows the normal register file (Bank 0) to be
R/W
Bank Independent: FDh; Linear: 0FDh
5
0
R/W
01h
4
0
to
0Fh
R/W
3
0
exchanges the lower 16 registers to an
Table 25
Table
Register Bank Pointer
ZLF645 Series Flash MCUs
R/W
on page 49).
24) selects which working
2
0
Product Specification
Register Pointer Register
R/W
1
0
R/W
0
0
48