z8f0822 ZiLOG Semiconductor, z8f0822 Datasheet - Page 107
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z8f0822
Manufacturer Part Number
z8f0822
Description
High Performance 8-bit Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8F0822.pdf
(264 pages)
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PS022517-0508
Receiving Data Using Interrupt-Driven Method
ditions). Follow the steps below to configure the UART receiver for interrupt-driven oper-
ation:
1. Write to the UART Baud Rate High and Low Byte Registers to set the required
2. Enable the UART pin functions by configuring the associated GPIO Port pins for
3. Execute a
4. Write to the Interrupt Control Registers to enable the UART Receiver interrupt and set
5. Clear the UART Receiver interrupt in the applicable Interrupt Request Register.
6. Write to the UART Control 1 Register to enable MULTIPROCESSOR (9-bit) mode
7. Write the device address to the Address Compare Register (automatic multiprocessor
8. Write to the UART Control 0 Register to:
9. Execute an
The UART is now configured for interrupt-driven data reception. When the UART
Receiver Interrupt is detected, the associated ISR performs the following:
1. Check the UART Status 0 Register to determine the source of the interrupt-error,
2. If the interrupt was due to data available, read the data from the UART Receive Data
3. Clear the UART Receiver Interrupt in the applicable Interrupt Request Register.
4. Execute the
The UART Receiver interrupt indicates the availability of new data (as well as error con-
baud rate.
alternate function operation.
the required priority.
functions, if desired.
–
–
–
modes only).
–
–
break, or received data.
Register. If operating in MULTIPROCESSOR (9-bit) mode, further actions may be
required depending on the Multiprocessor Mode bits MPMD[1:0].
Set the Multiprocessor Mode Select (MPEN) to enable MULTIPROCESSOR
mode.
Set the Multiprocessor Mode Bits,
matching scheme.
Configure the UART to interrupt on received data and errors or errors only
(interrupt on errors only is unlikely to be useful for Z8 Encore! XP devices
without a DMA block)
Set the receive enable bit (REN) to enable the UART for data reception
Enable parity, if required, and if MULTIPROCESSOR mode is not enabled, and
select either even or odd parity.
DI
EI
IRET
instruction to disable interrupts.
instruction to enable interrupts.
instruction to return from the ISR and await more data.
MPMD[1:0]
Universal Asynchronous Receiver/Transmitter
, to select the required address
Z8 Encore! XP
Product Specification
®
F0822 Series
94
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