z8f0822 ZiLOG Semiconductor, z8f0822 Datasheet - Page 95
z8f0822
Manufacturer Part Number
z8f0822
Description
High Performance 8-bit Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8F0822.pdf
(264 pages)
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PS022517-0508
COMPARE Mode
When the timer is disabled, the Timer Output signal is set to the value of this bit. When the
timer is enabled, the Timer Output signal is complemented upon timer Reload.
GATED Mode
0 = Timer counts when the Timer Input signal is High (1) and interrupts are
1 = Timer counts when the Timer Input signal is Low (0) and interrupts are
CAPTURE/COMPARE Mode
0 = Counting is started on the first rising edge of the Timer Input signal. The
1 = Counting is started on the first falling edge of the Timer Input signal. The
PRES—Prescale value
The timer input clock is divided by 2
reset each time the Timer is disabled. This insures proper clock division each time the
Timer is restarted.
000 = Divide by 1
001 = Divide by 2
010 = Divide by 4
011 = Divide by 8
100 = Divide by 16
101 = Divide by 32
110 = Divide by 64
111 = Divide by 128
TMODE—Timer Mode
000 = ONE-SHOT mode
001 = CONTINUOUS mode
010 = COUNTER mode
011 = PWM mode
100 = CAPTURE mode
101 = COMPARE mode
110 = GATED mode
111 = CAPTURE/COMPARE mode
generated on the falling edge of the Timer Input.
current count is captured on subsequent rising edges of the Timer Input signal.
generated on the rising edge of the Timer Input.
current count is captured on subsequent falling edges of the Timer Input signal.
PRES
, where PRES is set from 0 to 7. The prescaler is
Z8 Encore! XP
Product Specification
®
F0822 Series
Timers
82
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