z8f083a ZiLOG Semiconductor, z8f083a Datasheet - Page 159

• Manufacturer Part Number: z8f083a
• Description: High-performance 8-bit Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS026308-1207
Clock Failure Detection and Recovery
When selecting a new clock source, the primary oscillator failure detection circuitry and
the Watchdog Timer Oscillator failure circuitry must be disabled. If POFEN and WOFEN
are not disabled prior to a clock switch-over, it is possible to generate an interrupt for a
failure of either oscillator. The failure detection circuitry is enabled anytime after a
successful write of OSCSEL in the oscillator control register.
The internal precision oscillator is enabled by default. If the user code changes to a
different oscillator, it may be appropriate to disable the IPO for power savings. Disabling
the IPO does not occur automatically.
Primary Oscillator Failure
The Z8F08xA family devices generates non-maskable interrupt-like events when the
primary oscillator fails. To maintain system function in this situation, the clock failure
recovery circuitry automatically forces the Watchdog Timer Oscillator to drive the system
clock. The Watchdog Timer Oscillator must be enabled to allow the recovery. Although
this oscillator runs at a much slower speed than the original system clock, the CPU
continues to operate, allowing execution of a clock failure vector and software routines
that either remedy the oscillator failure or issue a failure alert. This automatic switch-over
is not available if the Watchdog Timer is the primary oscillator. It is also unavailable if the
Watchdog Timer Oscillator is disabled, though it is not necessary to enable the Watchdog
timer reset function outlined in the Watchdog Timer chapter of this document.
The primary oscillator failure detection circuitry asserts if the system clock frequency
drops below 1 kHz ±50%. If an external signal is selected as the system oscillator, it is
possible that a very slow but non-failing clock generates a failure condition. Under these
conditions, do not enable the clock failure circuitry (POFEN must be deasserted in the
OSCCTL register).
Watchdog Timer Failure
In the event of a Watchdog Timer Oscillator failure, a similar non-maskable interrupt-like
event is issued. This event does not trigger an attendant clock switch-over, but alerts the
CPU of the failure. After a Watchdog Timer failure, it is no longer possible to detect a
primary oscillator failure. The failure detection circuitry does not function if the Watchdog
Timer is used as the primary oscillator or if the Watchdog Timer Oscillator has been
disabled. For either of these cases, it is necessary to disable the detection circuitry by
deasserting the WDFEN bit of the OSCCTL register.
The Watchdog Timer Oscillator failure detection circuit counts system clocks while
looking for a Watchdog Timer clock. The logic counts 8004 system clock cycles before
determining that a failure has occurred. The system clock rate determines the speed at
which the Watchdog Timer failure is detected. A very slow system clock results in very
slow detection times.
Z8 Encore!
Product Specification
®
F083A Series
Oscillator Control
147