z8f083a ZiLOG Semiconductor, z8f083a Datasheet - Page 86

• Manufacturer Part Number: z8f083a
• Description: High-performance 8-bit Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS026308-1207
The timer continues counting up to the 16-bit reload value stored in the timer reload high
and low byte registers. On reaching the reload value, the timer generates an interrupt and
continues counting. The INPCAP bit in TxCTL1 register clears, indicating the timer
interrupt is not because of an input Capture event.
The steps for configuring a timer for CAPTURE mode and initiating the count are as
follows:
1. Write to the timer control register to:
2. Write to the timer high and low byte registers to set the starting count value (typically
3. Write to the timer reload high and low byte registers to set the reload value.
4. Clear the timer PWM high and low byte registers to 0000H. Clearing these registers
5. Enable the timer interrupt, if appropriate, and set the timer interrupt priority by writing
6. Configure the associated GPIO port pin for the timer input alternate function.
7. Write to the timer control register to enable the timer and initiate counting.
In CAPTURE mode, the elapsed time between the timer start and the Capture event is
calculated using the following equation:
Capture Elapsed Time (s)
CAPTURE RESTART Mode
In CAPTURE RESTART mode, the current timer count value is recorded when the
acceptable external timer input transition occurs. The capture count value is written to the
timer PWM high and low byte registers. The timer input is the system clock. The TPOL
bit in the timer control register determines whether the capture occurs on a rising edge or a
falling edge of the timer input signal. When the Capture event occurs, an interrupt is
generated and the count value in the timer high and low byte registers is reset to
–
–
–
–
0001H
allows user software to determine if interrupts were generated either by a Capture
event or by a reload. If the PWM high and low byte registers still contain 0000H after
the interrupt, the interrupt were generated by a reload.
to the relevant interrupt registers. By default, the timer interrupt is generated for both
input capture and Reload events. If appropriate, configure the timer interrupt to be
generated only at the input Capture event or the Reload event by setting TICONFIG
field of the TxCTL1 register.
Disable the timer
Configure the timer for CAPTURE mode
Set the prescale value
Set the capture edge (rising or falling) for the timer input
).
=
(
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Capture Value Start Value
System Clock Frequency (Hz)
–
Z8 Encore!
)
Product Specification
×
Prescale
®
F083A Series
0001H
Timers
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