mc9s08en32 Freescale Semiconductor, Inc, mc9s08en32 Datasheet - Page 130
mc9s08en32
Manufacturer Part Number
mc9s08en32
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S08EN32.pdf
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Chapter 8 Multi-Purpose Clock Generator (S08MCGV1)
8.3.3
130
Field
TRIM
7:0
Reset:
POR:
W
R
MCG Trim Register (MCGTRM)
MCG Trim Setting — Controls the internal reference clock frequency by controlling the internal reference clock
period. The TRIM bits are binary weighted (i.e., bit 1 will adjust twice as much as bit 0). Increasing the binary
value in TRIM will increase the period, and decreasing the value will decrease the period.
An additional fine trim bit is available in MCGSC as the FTRIM bit.
If a TRIM[7:0] value stored in nonvolatile memory is to be used, it’s the user’s responsibility to copy that value
from the nonvolatile memory location to this register.
U
7
1
Table 8-3. MCG Trim Register Field Descriptions
U
0
6
Figure 8-5. MCG Trim Register (MCGTRM)
MC9S08EN32 Series Data Sheet, Rev. 3
U
0
5
U
0
4
Description
TRIM
U
0
3
U
0
2
Freescale Semiconductor
U
0
1
U
0
0
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