m37516e6hp Renesas Electronics Corporation., m37516e6hp Datasheet - Page 58

• Manufacturer Part Number: m37516e6hp
• Description: Single-chip 8-bit Cmos Microcomputer
• Manufacturer: Renesas Electronics Corporation.

7516 Group
Status Register (SRD)
The status register shows the operating status of the flash
memory and whether erase operations and programs ended suc-
cessfully or in error. It can be read in the following ways:
(1) By reading an arbitrary address from the User ROM area after
(2) By reading an arbitrary address from the User ROM area in the
Also, the status register can be cleared by writing the clear status
register command (50
After reset, the status register is set to “80
Table 15 shows the status register. Each bit in this register is ex-
plained below.
•Sequencer status (SR7)
The sequencer status indicates the operating status of the flash
memory. This bit is set to “0” (busy) during write or erase operation
and is set to “1” when these operations ends.
After power-on, the sequencer status is set to “1” (ready).
Table 15 Definition of each bit in status register (SRD)
Rev.1.01
writing the read status register command (70
period from when the program starts or erase operation starts
to when the read array command (FF
SR7 (bit7)
SR6 (bit6)
SR5 (bit5)
SR4 (bit4)
SR3 (bit3)
SR2 (bit2)
SR1 (bit1)
SR0 (bit0)
Symbol
Jul 01, 2003
16
).
page 56 of 89
Sequencer status
Reserved
Erase status
Program status
Reserved
Reserved
Reserved
Reserved
Status name
16
16
) is input.
”.
16
)
•Erase status (SR5)
The erase status indicates the operating status of erase operation.
If an erase error occurs, it is set to “1”. When the erase status is
cleared, it is set to “0”.
•Program status (SR4)
The program status indicates the operating status of write opera-
tion. When a write error occurs, it is set to “1”.
The program status is set to “0” when it is cleared.
If “1” is written for any of the SR5 and SR4 bits, the program,
erase all blocks, and block erase commands are not accepted.
Before executing these commands, execute the clear status regis-
ter command (50
Also, if any commands are not correct, both SR5 and SR4 are set
to “1”.
Terminated in error
Terminated in error
Ready
“1”
-
-
-
-
-
16
) and clear the status register.
Definition
Terminated normally
Terminated normally
“0”
Busy
-
-
-
-
-