cop87l84rg National Semiconductor Corporation, cop87l84rg Datasheet - Page 24

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cop87l84rg

Manufacturer Part Number
cop87l84rg
Description
8-bit One-time Programmable Microcontroller With Kbytes Program Memory
Manufacturer
National Semiconductor Corporation
Datasheet

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Interrupts
When an ST occurs the user can re-initialize the stack
pointer and do a recovery procedure (similar to reset but
not necessarily containing all of the same initialization pro-
cedures) before restarting
The occurrence of an ST is latched into the ST pending bit
The GIE bit is not affected and the ST pending bit (not
accessible by the user) is used to inhibit other interrupts
and to direct the program to the ST service routine with the
VIS instruction The RPND instruction is used to clear the
software interrupt pending bit This pending bit is also
cleared on reset
The ST has the highest rank among all interrupts
Nothing (except another ST) can interrupt an ST being
serviced
WATCHDOG
The devices contain a WATCHDOG and clock monitor The
WATCHDOG is designed to detect the user program getting
stuck in infinite loops resulting in loss of program control or
‘‘runaway’’ programs The Clock Monitor is used to detect
the absence of a clock or a very slow clock below a speci-
fied rate on the CKI pin
The WATCHDOG consists of two independent logic blocks
WD UPPER and WD LOWER WD UPPER establishes the
upper limit on the service window and WD LOWER defines
the lower limit of the service window
Servicing the WATCHDOG consists of writing a specific val-
ue to a WATCHDOG Service Register named WDSVR
which is memory mapped in the RAM This value is com-
posed of three fields consisting of a 2-bit Window Select a
5-bit Key Data field and the 1-bit Clock Monitor Select field
Table V shows the WDSVR register
The lower limit of the service window is fixed at 2048 in-
struction cycles Bits 7 and 6 of the WDSVR register allow
the user to pick an upper limit of the service window
Table VI shows the four possible combinations of lower and
upper limits for the WATCHDOG service window This flexi-
bility in choosing the WATCHDOG service window prevents
any undue burden on the user software
Bits 5 4 3 2 and 1 of the WDSVR register represent the 5-
bit Key Data field The key data is fixed at 01100 Bit 0 of the
WDSVR Register is the Clock Monitor Select bit
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TABLE V WATCHDOG Service Register (WDSVR)
X
7
Window
Select
X
6
Match
Don’t Care
Mismatch
Don’t Care
Key Data
(Continued)
0
5
1
4
Key Data
1
3
Window Data
Match
Mismatch
Don’t Care
Don’t Care
0
2
TABLE VII WATCHDOG Service Actions
0
1
Monitor
Clock
Clock Monitor
Y
0
Match
Don’t Care
Don’t Care
Mismatch
24
Clock Monitor
The Clock Monitor aboard the device can be selected or
deselected under program control The Clock Monitor is
guaranteed not to reject the clock if the instruction cycle
clock (1 t
clock input rate on CKI of greater or equal to 100 kHz
WATCHDOG Operation
The WATCHDOG and Clock Monitor are disabled during
reset The device comes out of reset with the WATCHDOG
armed the WATCHDOG Window Select bits (bits 6 7 of the
WDSVR Register) set and the Clock Monitor bit (bit 0 of the
WDSVR Register) enabled Thus a Clock Monitor error will
occur after coming out of reset if the instruction cycle clock
frequency has not reached a minimum specified value in-
cluding the case where the oscillator fails to start
The WDSVR register can be written to only once after reset
and the key data (bits 5 through 1 of the WDSVR Register)
must match to be a valid write This write to the WDSVR
register involves two irrevocable choices (i) the selection of
the WATCHDOG service window (ii) enabling or disabling of
the Clock Monitor Hence the first write to WDSVR Register
involves selecting or deselecting the Clock Monitor select
the
WATCHDOG key data Subsequent writes to the WDSVR
register will compare the value being written by the user to
the WATCHDOG service window value and the key data
(bits 7 through 1) in the WDSVR Register Table VII shows
the sequence of events that can occur
The user must service the WATCHDOG at least once be-
fore the upper limit of the service window expires The
WATCHDOG may not be serviced more than once in every
lower limit of the service window The user may service the
WATCHDOG as many times as wished in the time period
between the lower and upper limits of the service window
The first write to the WDSVR Register is also counted as a
WATCHDOG service
The WATCHDOG has an output pin associated with it This
is the WDOUT pin on pin 1 of the port G WDOUT is active
low The WDOUT pin is in the high impedance state in the
inactive state Upon triggering the WATCHDOG the logic
will pull the WDOUT (G1) pin low for an additional
16 t
below the lower Schmitt trigger threshold After this delay
the device will stop forcing the WDOUT output low
WDSVR
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TABLE VI WATCHDOG Service Window Select
–32 t
Bit 7
Valid Service Restart Service Window
Error Generate WATCHDOG Output
Error Generate WATCHDOG Output
Error Generate WATCHDOG Output
WATCHDOG
0
0
1
1
c
c
) is greater or equal to 10 kHz This equates to a
cycles after the signal level on WDOUT pin goes
WDSVR
Bit 6
Action
service
0
1
0
1
window
(Lower-Upper Limits)
Service Window
2k –8k t
2k– 16k t
2k– 32k t
2k– 64k t
and
c
c
c
c
Cycles
Cycles
Cycles
Cycles
match
the

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