cop87l84rg National Semiconductor Corporation, cop87l84rg Datasheet - Page 9

• Manufacturer Part Number: cop87l84rg
• Description: 8-bit One-time Programmable Microcontroller With Kbytes Program Memory
• Manufacturer: National Semiconductor Corporation

Figure 7 shows the Crystal and R C diagrams
Reset
Ports being initialized to the TRI-STATE mode Pin G1 of the
G Port is an exception (as noted below) since pin G1 is
dedicated as the WATCHDOG and or Clock Monitor error
output pin Port D is set high The PC PSW ICNTRL
CNTRL T2CNTRL and T3CNTRL control registers are
cleared The UART registers PSR ENU (except that TBMT
bit is set) ENUR and ENUI are cleared The Comparator
Select Register is cleared The S register is initialized to
zero The Multi-Input Wake Up registers WKEN WKEDG
and WKPND are cleared The stack pointer SP is initialized
to 6F Hex
The device comes out of reset with both the WATCHDOG
logic and the Clock Monitor detector armed with the
WATCHDOG service window bits set and the Clock Monitor
bit set The WATCHDOG and Clock Monitor circuits are in-
hibited during reset The WATCHDOG service window bits
being initialized high default to the maximum WATCHDOG
service window of 64k t
being initialized high will cause a Clock Monitor error follow-
ing reset if the clock has not reached the minimum specified
frequency at the termination of reset A Clock Monitor error
will cause an active low error output on pin G1 This error
output will continue until 16 t
the clock frequency reaching the minimum specified value
at which time the G1 output will enter the TRI-STATE mode
The external RC network shown in Figure 6 should be used
to ensure that the RESET pin is held low until the power
supply to the chip stabilizes
Note Continual state of reset will cause the device to draw excessive cur-
RC
Oscillator Circuits
The chip can be driven by a clock input on the CKI input pin
which can be between DC and 10 MHz The CKO output
clock is on pin G7 (crystal configuration) The CKI input fre-
quency is divided down by 10 to produce the instruction
cycle clock (1 t
l
FIGURE 7 Crystal and R C Oscillator Diagrams
rent
5
c
FIGURE 6 Recommended Reset Circuit
Power Supply Rise Time
(Continued)
c
)
c
clock cycles The Clock Monitor bit
c
–32 t
c
clock cycles following
TL DD 12872 – 6
TL DD12872 – 7
9
CRYSTAL OSCILLATOR
CKI and CKO can be connected to make a closed loop
crystal (or resonator) controlled oscillator
Table I shows the component values required for various
standard crystal values
R C OSCILLATOR
By selecting CKI as a single pin oscillator input a single pin
R C oscillator circuit can be connected to it CKO is avail-
able as a general purpose input and or HALT restart pin
Table II shows the variation in the oscillator frequencies as
functions of the component (R and C) values
Note 3k
Control Registers
CNTRL Register (Address X 00EE)
The Timer1 (T1) and MICROWIRE PLUS control register
contains the following bits
T1C3 T1C2 T1C1 T1C0 MSEL IEDG
Bit 7
(k )
(k )
TABLE I Crystal Oscillator Configuration T
R1
SL1
IEDG
MSEL
T1C0
T1C1
T1C2
T1C3
3 3
5 6
6 8
0
0
0
TABLE II R C Oscillator Configuration T
R
50 pF
s
(M )
SL0 Select the MICROWIRE PLUS clock divide
R2
R
(pF)
100
100
s
1
1
1
82
C
s
C
200k
by (00
External interrupt edge polarity select
(0
Selects G5 and G4 as MICROWIRE PLUS
signals
SK and SO respectively
Timer T1 Start Stop control in timer
modes 1 and 2
Timer T1 Underflow Interrupt Pending Flag in
timer mode 3
Timer T1 mode control bit
Timer T1 mode control bit
Timer T1 mode control bit
s
(pF)
200 pF
200
C1
e
30
30
CKI Freq
2 2– 2 7
1 1– 1 3
0 9– 1 1
(MHz)
Rising edge 1
e
100– 150
2 01
30– 36
30– 36
(pF)
C2
e
Instr Cycle
8 8– 10 8
3 7– 4 6
7 4 – 9 0
4 1x
( s)
CKI Freq
e
(MHz)
0 455
10
Falling edge)
4
e
8)
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Conditions
Conditions
A
SL1
V
V
V
V
V
V
www national com
A
CC
CC
CC
e
CC
CC
CC
e
25 C
e
e
e
e
e
e
25 C
SL0
Bit 0
5V
5V
5V
5V
5V
5V