cop888cf National Semiconductor Corporation, cop888cf Datasheet - Page 6

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cop888cf

Manufacturer Part Number
cop888cf
Description
8-bit Cmos Rom Based Microcontrollers With 4k Memory And A/d Converter
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
Allowable Sink/Source
Current per Pin
Maximum Input Current
without Latchup (Note 7)
RAM Retention Voltage, V
Input Capacitance
Load Capacitance on D2
Resolution
Reference Voltage Input
Absolute Accuracy
Non-Linearity
Differential Non-Linearity
Input Reference Resistance
Common Mode Input Range (Note 8)
DC Common Mode Error
Off Channel Leakage Current
On Channel Leakage Current
A/D Clock Frequency (Note 6)
Conversion Time (Note 5)
DC Electrical Characteristics 988CF:
Note 2: Rate of voltage change must be less then 0.5 V/ms.
Note 3: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 4: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Test conditions: All inputs tied to V
outputs and set high. The D port set to zero. The A/D is disabled. V
A/D Converter Specifications
Note 5: Conversion Time includes sample and hold time.
Note 6: See Prescaler description.
Note 7: Pins G6 and RESET are designed with a high voltage input network for factory testing. These pins allow input voltages greater than V
have sink current to V
tance to V
Note 8: For V
input voltages below ground or above the V
to conduct — especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec allows 50 mV forward bias of either diode. This means
that as long as the analog V
voltage range will therefore require a minimum supply voltage of 4.950 V
should be −0.3V to V
0˚C
V
D Outputs (Sink)
All others
CC
= 5V
T
A
CC
is 750
±
IN
+70˚C unless otherwise specified
10% (V
(−) V
Parameter
Parameter
CC
IN
CC
(typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.
(+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input. The diodes will forward conduct for analog
+0.3V.
SS
when biased at voltages greater than V
IN
− 0.050V)
does not exceed the supply voltage by more than 50 mV, the output code will be correct. To achieve an absolute 0 V
r
CC
Any Input
supply. Be careful, during testing at low V
AGND = 0V
V
V
Deviation from the
Best Straight Line
V
REF
REF
REF
T
500 ns Rise
and Fall Time (Min)
A
(V
= V
= V
= V
= 25˚C
CC
Conditions
CC
REF
CC
CC
CC
+ 0.050V)
(the pins do not have source current when biased at a voltage below V
Conditions
DC
is tied to AGND (effectively shorting the Reference resistor). The clock monitor is disabled.
over temperature variations, initial tolerance and loading. The voltage at any analog input
(Continued)
6
CC
levels (4.5V), as high level analog inputs (5V) can cause this input diode
AGND
Min
1.6
0.1
3
Min
2
Typ
12
1
1
Typ
V
Max
1.67
V
CC
±
±
±
4.8
±
REF
8
CC
1
1
1
, L and G0–G5 configured as
1
2
2
4
±
1000
Max
CC
15
100
3
7
). The effective resis-
CC
DC
and the pins will
A/D Clock
to 5 V
Cycles
Units
MHz
LSB
LSB
LSB
LSB
Bits
k
µA
µA
V
V
DC
Units
mA
mA
mA
pF
pF
input
V

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