cop8fg National Semiconductor Corporation, cop8fg Datasheet - Page 8

• Manufacturer Part Number: cop8fg
• Description: 8-bit Cmos Rom Based And Otp Microcontrollers With 8k To 32k Memory, Two Comparators And Usart
• Manufacturer: National Semiconductor Corporation

www.national.com
Maximum Input Current without Latchup
(Note 7)
RAM Retention Voltage, Vr
V
Input Capacitance
Load Capacitance on D2
DC Electrical Characteristics
AC Electrical Characteristics
Note 3: t
Note 4: Maximum rate of voltage change must be
Note 5: Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, External Oscillator, inputs connected to V
but not connected to a load.
Note 6: The HALT mode will stop CKI from oscillating in the R/C and the Crystal configurations. In the R/C configuration, CKI is forced high internally. In the crystal
or external configuration, CKI is TRI-STATE. Measurement of I
grammed as low outputs and not driving a load; all outputs programmed low and not driving a load; all inputs tied to V
to HALT mode entered via setting bit 7 of the G Port data register.
Note 7: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages
biased at voltages
pins will not latch up. The voltage at the pins must be limited to
ESD transients.
Note 8: The output propagation delay is referenced to the end of the instruction cycle where the output change occurs.
Note 9: Parameter characterized but not tested.
Note 10: Rise times faster than the minimum specification may trigger an internal power-on-reset.
Note 11: MICROWIRE Setup and Hold Times and Propagation Delays are referenced to the appropriate edge of the MICROWIRE clock. See and the MICROWIRE
operation description.
−40˚C
Instruction Cycle Time (t
External CKI Clock Duty Cycle (Note 9)
Output Propagation Delay (Note 8)
MICROWIRE Setup Time (t
11)
MICROWIRE Hold Time (t
11)
MICROWIRE Output Propagation
Delay (t
Input Pulse Width (Note 9)
Reset Pulse Width
CC
−40˚C
Crystal/Resonator, External
R/C Oscillator (Internal)
Rise Time (Note 9)
Fall Time (Note 9)
t
SO, SK
All Others
Interrupt Input High Time
Interrupt Input Low Time
Timer 1, 2, 3, Input High Time
Timer 1 2, 3, Input Low Time
PD1
Rise Time from a V
Frequency Variation (Note 9)
, t
C
UPD
PD0
T
= Instruction cycle time.
A
T
A
) (Note 11)
+85˚C unless otherwise specified.
Parameter
Parameter
>
+85˚C unless otherwise specified.
V
CC
(the pins do not have source current when biased at a voltage below V
CC
C
)
UWH
UWS
2.0V
) (Note
) (Note
<
0.5 V/ms.
Room Temp.
(Note 10)
(Note 9)
(Note 9)
4.5V
4.5V
4.5V
fr = Max
fr = 10 MHz Ext Clock
fr = 10 MHz Ext Clock
R
4.5V
4.5V
L
DD
(Continued)
<
= 2.2k, C
14V. WARNING: Voltages in excess of 14V will cause damage to the pins. This warning excludes
HALT is done with device neither sourcing nor sinking current; with L. F, C, G0, and G2–G5 pro-
Conditions
V
V
V
V
V
CC
CC
CC
CC
CC
Conditions
L
5.5V
5.5V
5.5V
5.5V
5.5V
= 100 pF
8
CC
). The effective resistance to V
0.67
Min
45
20
56
1
1
1
1
1
>
V
CC
and the pins will have sink current to V
Min
2.0
12
CC
Typ
±
2
35
; clock monitor disabled. Parameter refers
Typ
CC
is 750
Max
220
0.7
1.0
55
12
CC
8
and outputs driven low
±
1000
(typical). These two
Max
200
7
Units
CC
µs
µs
ns
ns
µs
µs
ns
ns
ns
µs
%
%
t
t
t
t
C
C
C
C
Units
when
mA
µs
pF
pF
V