acpl-w70l Avago Technologies, acpl-w70l Datasheet - Page 13

• Manufacturer Part Number: acpl-w70l
• Description: Single-channel And Dual-channel High Speed 15 Mbd Cmos Optocoupler With Glitch-free Power-up Feature
• Manufacturer: Avago Technologies

OPEN-COLLECTOR
Table 1. Effects of Common Mode Pulse Direction on Transient I
CMR with Other Drive Circuits
CMR performance with drive circuits other than that
shown in Figure 13 may be enhanced by following these
guidelines:
1. Use of drive circuits where current is shunted from the
2. Use
Using any one of the drive circuits in Figures 15-17 with
I
W70L AND ACPL-K73L, as long as the PC board layout
practices are followed. Figure 15 shows a circuit which can
be used with any totem-pole-output TTL/LSTTL/HCMOS
logic gate. The buffer PNP transistor allows the circuit to
be used with logic devices which have low current-sinking
capability. It also helps maintain the driving-gate power-
supply current at a constant level to minimize ground
shifting for other devices connected to the input-supply
ground.
Figure 15. TTL interface circuit for the ACPl-W70L families.
13
TTL/CMOS
F
If
dV
positive (>0)
negative (<0) toward LED anode through C
74L504
= 6 mA will result in a typical CMR of 10 kV/μs for ACPL-
/OPEN-DRAIN
V
CM
LED in the LED “off” state (as shown in Figures 15 and
16). This is beneficial for good CM
recommendation.
½ R
½ R
GATE)
LOGIC GATE)
DD
(ANY
/dt Is:
V
(OR ANY
DD
total
total
74HC00
of
typical
then
I
away from LED anode through C
SHIELD
LP
I
LN
Flows:
V
I
C
LP
DD
LC
C
LA
2N3906
530 Ω
I
(ANY PNP)
FH
=
530 Ω
530 Ω
6mA
H
.
1
0.1µF
1
3
LA
per
1
3
ACPL-W70L
ACPL-W70L
LA
ACPL-W70L
datasheet
15pF
LED
and
I
away from LED cathode through C
toward LED cathode through C
LN
V
GND
V
O
DD2
Flows:
2
LED
LED
OPEN-COLLECTOR
Figure 16. TTL open-collector/open drain gate drive circuit for ACPL-W70L
families.
OUTPUT LOGIC
Figure 17. CMOS gate drive circuit for ACPL-W70L families.
When using an open-collector TTL or open-drain CMOS
logic gate, the circuit in Figure 16 may be used. When
using a CMOS gate to drive the optocoupler, the circuit
shown in Figure 17, where the resistor is recommended to
connect to the anode of the LED, may be used.
TOTEM-POLE
/OPEN-DRAIN
TTL/CMOS
V
½ R
LOGIC GATE)
DD
74L504
(OR ANY
74HC04
GATE)
GATE)
(OR ANY
(ANY
total
74HC00
V
DD
SHIELD
I
LC
LN
LC
C
LP
LC
V
C
DD
LA
If |I
LED I
Is Momentarily:
increased
decreased
2N3906
530 Ω
(ANY PNP)
LP
F
| < |I
Current
LN
530 Ω
530 Ω
|,
0.1µF
If |I
LED I
Is Momentarily:
decreased
increased
1
3
1
3
1
3
LP
ACPL-W70L
F
ACPL-W70L
| < |I
Current
ACPL-W70L
15pF
LN
V
GND
|,
LED
O
LED
2
LED
OUTPUT LOGIC
TOTEM-POLE
TTL/CMOS
74L504
(OR ANY
74HC04
GATE)
GATE
(ANY
V
DD