el2090cn Intersil Corporation, el2090cn Datasheet - Page 7

• Manufacturer Part Number: el2090cn
• Description: 100mhz Dc-restored Video Amplifier
• Manufacturer: Intersil Corporation

Applications Information
The EL2090 is a general purpose component and thus the
video amplifier and sample-and-hold pins are uncommitted.
Therefore much of the ultimate performance as a DC-
restored video amplifier will be set by external component
values and parasitics. Some application considerations will
be offered here.
The DC feedback from the sample-and-hold can be applied
to either positive or negative inputs of the video amplifier
(with appropriate phasing of the sample-and-hold amplifier
inputs). We will consider feedback to the inverting video
input. During a sample mode (the HOLD input at a logic low),
the sample-and-hold acts as a simple nulling op-amp.
Ideally, the DC feedback resistor Raz is a high value so as
not to couple a large amount of the AC signal on the video
input back to the sample-and-hold amplifier output. The
sample-and-hold output is a low impedance at high
frequencies, but variations of the DC operating point will
change the output impedance somewhat. No more than a
few ohms output impedance change will occur, but this can
cause gain variations in the 0.01% realm. This DC-
dependent gain change is in fact a differential gain effect.
Some small differential phase error will also be added. The
best approach is to maximize the DC feedback resistor value
so as to isolate the sample-and-hold from the video path as
much as possible. Values of 1k: or above for Raz will cause
little to no video degradation.
This suggests that the largest applicable power supply
voltages be used so that the output swing of the sample-and-
hold can still correct for the variations of DC offset in the
video input with large values of Raz. The typical application
circuit shown will allow correction of ±1V inputs with good
isolation of the sample-and-hold output. Good isolation is
defined as no video degradation due to the insertion of the
sample-and-hold loop. Lower supply voltages will require a
smaller value of DC feedback resistor to retain correction of
the full input DC variation. The EL2090 differential phase
performance is optimum at ±9V supplies, and differential
gain only marginally improves above this voltage. Since all
video characteristics mildly degrade with increasing die
temperature, the ±9V levels are somewhat better than ±15V
supplies. However, ±15V supplies are quite usable.
Ultimate video performance, especially in HDTV
applications, can also be optimized by setting the black-level
reference such that the signal span at the video amplifier's
output is set to its optimum range. For instance, setting the
span to ±1V of output is preferable to a span of 0V to +2V.
The curves of differential gain and phase versus input DC
offset will serve as guides.
The DC feedback resistor may be split so that a bypass
capacitor is added to reduce the initially small sample-and-
hold transients to even smaller levels. The corruption can be
reduced to as low as 1mV peak seen at the video amplifier
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EL2090
output. The size of the capacitor should not be so large as to
de-stabilize the sample-and-hold feedback loop, nor so small
as to reduce the video amplifier's gain flatness. A resistor or
some other video isolation network should be inserted
between the video amplifier output and the sample-and-hold
input to prevent excessive video from bleeding through the
autozero section, as well as preventing spurious DC
correction due to video signals confusing the sample-and-
hold during autozero events. Figure 1 shows convenient
component values. A full 3.58MHz trap is not necessary for
suppressing NTSC chroma burst interaction with the
sample-and-hold input; the simple R-C network suggested in
Figure 1 suffices.
The HOLD input to the sample-and-hold has a 1.4V
threshold and is clamped to a diode below ground and 6V
above ground. The hold step characteristics are not sensitive
to logic high nor low levels (within TTL or CMOS swings), but
logic slewrates greater than 1000V/µs can couple noise and
hold step into the sample-to-hold output waveforms. The
logic slewrate should be greater than 50V/µs to avoid hold
jitter. To avoid artificially high droop in hold mode, the Chold
pin and Chold itself should be guarded with circuit board
traces connected to the output of the sample-and-hold. Low-
leakage hold capacitors should be used, such as mica or
mylar, but not ceramic. The excellent properties of more
expensive polystyrene, polypropylene, or teflon capacitors
are not needed.
The user should be aware of a combination of conditions that
may make the EL2090 operate incorrectly upon power-up.
The fault condition can be described by noticing that the
sample-and-hold output (pin 11) appears locked at a voltage
close to V
changes at the inputs to the sample-and-hold (pins 5 and 6)
or to the HOLD control input (pin 7). Two conditions must
occur to bring this about:
For a sampling interval that is wide enough, there is enough
time for the loop to close and for the amplifier to discharge
whatever charge was dumped onto Chold it during the initial
power spike and to then ramp up (or down) to the voltage
that is proper for a balanced loop. When the sampling
interval is too small, there is insufficient time for internal
devices to recover from their initial saturated state from
power-up because the feedback is not closed long enough.
Therefore, typical recovery times for the loop are 2µs or
greater. Summarizing, the two things that could prevent
proper saturation recovery are (as mentioned above) too
1. A large value of Chold_usually values of 1000pF or more.
2. A sampling interval (dictated by the HOLD pin) that is too
This is not an unusual situation. Many users want to
reduce the size of the hold step and increasing Chold is
the most direct way to do this. Increasing Chold also
reduces the slew rate of the sample and hold section but
because of the limited size of the video signal, this is
usually not a limitation.
small. By small, we mean less than 2µs.
CC
. This voltage is maintained regardless of