ca3086m96 Intersil Corporation, ca3086m96 Datasheet - Page 2

• Manufacturer Part Number: ca3086m96
• Description: General Purpose Npn Transistor Array
• Manufacturer: Intersil Corporation

Absolute Maximum Ratings
The following ratings apply for each transistor in the device:
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -55
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
Electrical Specifications
Electrical Specifications
Collector-to-Base Breakdown Voltage
Collector-to-Emitter Breakdown Voltage
Collector-to-Substrate Breakdown Voltage
Emitter-to-Base Breakdown Voltage
Collector-Cutoff Current (Figure 1)
Collector-Cutoff Current (Figure 2)
DC Forward-Current Transfer Ratio (Figure 3)
DC Forward-Current Transfer Ratio
(Figure 3)
Base-to-Emitter Voltage (Figure 4)
V
Collector-to-Emitter
Saturation Voltage
Noise Figure (Low Frequency)
1. The collector of each transistor in the CA3086 is isolated from the substrate by an integral diode. The substrate (Terminal 13) must be
2.
Collector-to-Emitter Voltage, V
Collector-to-Base Voltage, V
Collector-to-Substrate Voltage, V
Emitter-to-Base Voltage, V
Collector Current, I
BE
connected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor
action. To avoid undesirable coupling between transistors, the substrate (Terminal 13) should be maintained at either DC or signal (AC)
ground. A suitable bypass capacitor can be used to establish a signal ground.
JA
Temperature Coefficient (Figure 5)
is measured with the component mounted on an evaluation PC board in free air.
PARAMETER
PARAMETER
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
EBO
CBO
CEO
. . . . . . . . . . . . . . . . . . . . . . . . . 5V
CIO
T
. . . . . . . . . . . . . . . . . . . . . . 20V
A
. . . . . . . . . . . . . . . . . . . . . 15V
T
A
= 25
(Note 1) . . . . . . . . . . . . 20V
= 25
o
C, Typical Values Intended Only for Design Guidance
o
C, For Equipment Design
SYMBOL
V
V
CE SAT
V
h
BE
NF
FE
BE
V
V
V
SYMBOL
/ T
V
(BR)CBO
(BR)CEO
(BR)EBO
o
(BR)ClO
I
I
C to 125
CBO
CEO
h
FE
V
V
V
I
f = 1kHz, V
R
B
CA3086
CE
CE
CE
S
= 1mA, I
o
= 1k
C
5-28
= 3V
= 3V
= 3V, l
l
I
I
I
V
V
V
TEST CONDITIONS
C
C
C
E
CB
CE
CE
= 10 A, I
= 10 A, I
= 1mA, I
= 10 A, I
Thermal Information
Thermal Resistance (Typical, Note 2)
Maximum Power Dissipation (Any one transistor). . . . . . . . . 300mW
Maximum Junction Temperature (Hermetic Packages) . . . . . . . 175
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
Maximum Storage Temperature Range . . . . . . . . . -65
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
TEST CONDITIONS
= 3V, I
= 10V, I
= 10V, I
CE
C
CERDIP Package . . . . . . . . . . . . . . . .
PDIP Package . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . .
(SOIC - Lead Tips Only)
C
= 10mA
= 1 mA
= 3V, I
C
B
E
C
CI
B
= 1mA
E
= 0
= 0
= 0
= 0,
C
= 0
= 0,
= 100 A,
I
I
I
I
C
C
E
E
= 10mA
= 10 A
= 1 mA
= 10mA
MIN
20
15
20
40
5
-
-
(Figure 2)
0.002
TYP
100
60
24
60
7
TYPICAL
VALUES
0.715
0.800
0.23
3.25
100
-1.9
54
JA
150
180
220
(
MAX
o
100
C/W)
5
-
-
-
-
-
o
C to 150
UNITS
mV/
JC
UNITS
dB
V
V
V
N/A
N/A
(
nA
75
o
V
V
V
V
o
A
C
C/W)
o
o
o
o
C
C
C
C