adm9240 Analog Devices, Inc., adm9240 Datasheet
adm9240
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adm9240 Summary of contents
Page 1
... ADC allows frequent sampling of all analog channels to ensure a fast interrupt response to any out-of-limit measurement. The ADM9240’s 2. 5.75 V supply voltage range, low supply current and I wide range of applications. These include hardware monitoring and protection applications in personal computers, electronic test equipment and office electronics ...
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... ADM9240–SPECIFICATIONS Parameter POWER SUPPLY Supply Voltage Supply Current TEMPERATURE-TO-DIGITAL CONVERTER Accuracy Resolution ANALOG-TO-DIGITAL CONVERTER (INCLUDING MUX AND ATTENUATORS) Total Unadjusted Error, TUE Differential Nonlinearity, DNL Power Supply Sensitivity Total Monitoring Cycle Time Input Resistance ANALOG OUTPUT ...
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... V for a falling edge and –3– ADM9240 Units Test Conditions/Comments –3.0 mA, OUT V = 4.25 V–5. –3.0 mA OUT V = 2.85 V–3. OUT 4.25 V–5.75 V ...
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... Package Range Description – +125 C 24-Lead TSSOP RU-24 PIN CONFIGURATION NTEST_OUT/A0 VID0 VID1 2 23 SDA VID2 3 22 SCL VID3 4 21 FAN1 VID4 5 20 ADM9240 FAN2 + CCP1 TOP VIEW (Not to Scale) CI +2. GNDD +3. + INT +12V ...
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... Digital I/O. An active high input from an external circuit that latches a Chassis Intrusion event. This line can go high without any clamping action regardless of the powered state of the ADM9240. The ADM9240 provides an internal open drain on this line, controlled by Bit 6 of Register 40h or Bit 7 of Register 46h, to provide a minimum 20 ms pulse on this line, to reset the external Chassis Intrusion Latch ...
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... Serial Address Register: Stores the serial bus address of the ADM9240. Address Pointer Register: Contains the address that selects one of the other internal registers. When writing to the ADM9240, the first byte of data is always a register address, which is written to the Address Pointer Register. Interrupt (INT) Status Registers: Two registers to provide status of each Interrupt event ...
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... The facility to make hardwired changes to A1 and A0 allows the user to avoid conflicts with other devices sharing the same serial bus, for example if more than one ADM9240 is used in a sys- tem. Once the ADM9240 has been powered up, the five MSBs of the serial bus address may be changed by writing a 7-bit word to the serial Address Pointer Register (the hardwired values of A0 and A1 cannot be overwritten) ...
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... A1 and A0 are hardwired to either Logic 0 or Logic 1. ANALOG INPUTS The ADM9240 has six analog inputs. Four of these are dedi- cated to monitoring the following power supply voltages: + +3.3 V, +2.5 V. These inputs are multiplexed into the on-chip, successive ap- proximation, analog-to-digital converter ...
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... ADM9240 42.7k +V CCP2 50pF 97.3k 122.2k +12V 35pF 22.7k 91.6k +5V 55.2k 25pF MUX 61 ...
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... V+ and the input resistors, a variety of nega- tive and/or bipolar input ranges can be obtained. TEMPERATURE MEASUREMENT SYSTEM The ADM9240 contains an on-chip bandgap temperature sen- sor. The on-chip ADC performs 9-bit conversions on the output of this sensor and outputs the temperature data in 9-bit twos complement format, but only the eight most significant bits are used for temperature limit comparison ...
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... V difference, with the series resistors this would draw a maximum current of approximately 24 mA. ANALOG OUTPUT The ADM9240 has a single analog output from an unsigned 8-bit DAC which produces 0 V–1.25 V. The analog output register defaults to FF during power-on reset, which produces maximum fan speed ...
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... INPUT CURRENT LIMITING the fans are powered while the ADM9240 is unpowered, the inputs of the ADM9240 will try to clamp the fan output volt- age. In this case the input current must be limited to less than FAN SPEED the maximum value in the Absolute Maximum Ratings table. ...
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... Bit 6 of the Configuration Register, or Bit 7 of the Chassis Intrusion Clear Register to one, which will cause the CI pin to be pulled low for at least 20 ms. These register bits are self-clearing. –13– ADM9240 Frame Size 0.79 in (60 mm sq. 20 mm) 9–16 0.98 in (60 mm sq. 25 mm) 14–25 0.79 in (80 mm sq. 20 mm) 25– ...
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... ADM9240 was powered down. 100k CI THE ADM9240 INTERRUPT STRUCTURE The Interrupt Structure of the ADM9240 is shown in Figure 9. As each measurement value is obtained and stored in the 10k appropriate value register, the value and the limits from the corresponding limit registers are fed to the high and low limit comparators ...
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... READ READ READ NAND TREE TESTS A NAND tree is provided in the ADM9240 for Automated Test Equipment (ATE) board level connectivity testing. The device is placed into NAND Test Mode by powering up with Pin 11 held high. This pin is sampled automatically after power-up and if it connected high, then the NAND test mode is invoked. ...
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... Control of the ADM9240 is provided through the Configuration Register. The ADC is stopped upon power-up, and the INT_Clear signal is asserted, clearing the INT output. The Configuration Register is used to start and stop the ADM9240; enable or dis- able interrupt outputs and modes, and provide the initialization function described above. ...
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... F 0 +3.3V NTEST_IN/AOUT OP295 RESET 10k Figure 14. Application Circuit –17– ADM9240 VID0 VID1 A1 VID2 FROM VID PINS OF PROCESSOR VID3 FAN1 VID4 510 FAN2 +V CCP1 ADM9240 510 CI +2.5V 510 GNDD +3.3V 510 + 510 INT +12V 510 +V CCP2 GNDA ...
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... Serial Address Register 49h VID4 Register 4Bh Temperature Configuration Register Table V. Address Pointer Register R/W Description Write Address of ADM9240 Registers. See the tables below for detail. Table VI. List of Registers Power on Value 0000 0000 1111 1111 Indeterminate Indeterminate Indeterminate Indeterminate Indeterminate Indeterminate ...
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... Interrupt pins will not be cleared if the user writes a zero to this location after an interrupt has occurred (see “INT_Clear” bit). At startup, limit checking functions and scan- ning begins. Note, all high and low limits should be set into the ADM9240 prior to turning on this bit. (Power-Up Default = 0.) Logic 1 enables the INT output ...
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... ADM9240 Table X. Register 43h, INT Interrupt Mask Register 1 (Power-On Default = 00h) Bit Name R/W 0 +2.5 V Read/Write 1 +V Read/Write CCP1 2 +3.3 V Read/Write Read/Write 4 Temp Read/Write 5 Reserved Read/Write 6 FAN1 Read/Write 7 FAN2 Read/Write Table XI. Register 44h, INT Mask Register 2 (Power-On Default = 00h) Bit Name ...
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... Bit 1 and Bit 0 selects the comparator mode. This gives an INT when the temperature exceeds the hot limit. This INT remains active until the temperature goes below the hot limit (no hysteresis), when the INT will become inactive. Default = 00000 LSB of Temperature Reading = 0.5 C –21– ADM9240 ® ...
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... ADM9240 0.006 (0.15) 0.002 (0.05) SEATING PLANE OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 24-Lead TSSOP (RU-24) 0.311 (7.90) 0.303 (7.70 PIN 1 0.0433 (1.10) MAX 8 0.0118 (0.30) 0.0256 (0.65) 0 0.0079 (0.20) BSC 0.0075 (0.19) 0.0035 (0.090) –22– 0.028 (0.70) 0.020 (0.50) REV. 0 ...