x46402 Intersil Corporation, x46402 Datasheet

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x46402

Manufacturer Part Number
x46402
Description
Dual Voltage Cpu Supervisor With 64k Password Protected Eeprom
Manufacturer
Intersil Corporation
Datasheet
Functional Diagram
64K
FEATURES
• Dual Voltage Detection and Reset Assertion
• Selectable Watchdog Timer
• Volatile Flag shows Watchdog/Low Voltage Reset
• 64kbit 2-wire Serial EEPROM
• Two 64-Byte OTP memory blocks
• Adjustable size Password Protected Array
• 8 count tamper counter for invalid passwords
• Operates at 2.5-3.7V
• 8L TSSOP package
9900-3003 5 1/11/00 CM
Preliminary Information
Xicor, Inc. 1994, 1995, 1996, 1998 Patents Pending
SDA
SCL
—Low Vcc Monitor
—Low V2MON Monitor
—Low Vcc Block of EEPROM Writes
—RESET Signal Valid down to Vcc=1V
—150ms, 450ms, 1s, 5s, 10s, 20s, 1min, OFF
—1MHz Serial Interface speed
—64-Byte Page Write Mode
—Requires 64-bit OTP password to write
—64 Bit Read and Write Array Passwords
—Non-password protected array area
WP
Dual Voltage CPU Supervisor with 64K Password Protected EEPROM
Password Logic
Command
Write Control
Decode
Control
Logic
and
(Vcc) Control Signal
Write Password Area
(64, 128, 256, 512,
2K, 4K, All, None)
No Password Area
Timing and Control
HV Generation
(Bytes)
OTP array 1
OTP array 2
Data Register
Passwords
Control
Y Decoder
X46402
1
DESCRIPTION
The X46402 combines several functions into one device.
The first is a dual voltage CPU supervisor plus 64Kbit
serial EEPROM memory with password protected write
and read operations. The size of the password protected
area is selectable by 3 control bits. A Write Protect (WP)
pin in conjunction with a WPEN bit provides hardware
OTP control of the configuration of the array. Password
protected areas require 64 bit read or write passwords
prior to access. The eighth illegal password entry
(regardless of the number of correct entries) sets an OTP
tamper bit. This bit is one of the 32 bits in the Device ID.
A secondary voltage monitor circuit activates a V2FAIL
pin when the secondary supply voltage drops below a
V2trip voltage. This circuit is primarily intended to detect
the immediate loss of the battery supply.
A low Vcc voltage detect circuit activates a RESET pin
when Vcc drops below a V
blocks read or write operations.
A watchdog timer with the time period controlled by three
bits provides several possible time out periods from
150ms to 1 minute.
POWER ON AND
LOW VOLTAGE
GENERATION
WATCHDOG
TIMER RESET
WATCHDOG
TIMEBASE
RESET &
RESET
Characteristics subject to change without notice
TRIP
-
-
+
+
voltage. This signal also
V
TRIP
V
2TRIP
RESET
V2FAIL
Vcc
V2MON

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x46402 Summary of contents

Page 1

... Xicor, Inc. 1994, 1995, 1996, 1998 Patents Pending 9900-3003 5 1/11/00 CM X46402 DESCRIPTION The X46402 combines several functions into one device. The first is a dual voltage CPU supervisor plus 64Kbit serial EEPROM memory with password protected write and read operations. The size of the password protected area is selectable by 3 control bits ...

Page 2

... V CC Power On Reset V2MON SCL Application of power to the X46402 activates a Power On V2FAIL Reset Circuit. This circuit goes active at 1V and pulls the RESET pin active. This signal prevents the system micro- processor from starting to operate with insufficient volt- age or prior to stabilization of the oscillator. When Vcc ...

Page 3

... X46402 Volt Reg OTP Mode Enabled Pin1 Vss V2MON WP SDA V2FAIL RESET Recommended Connection ARCHITECTURE Data Memory This 64kbit memory array can be partitioned into pass- word protected or non-password protected areas. When password protected, the contents are readable after sending a “Memory Read” password. The contents of a password protected portion of the memory array are writeable with a “ ...

Page 4

... Data is transferred in 8-bit segments, with each transfer being followed by an ACK, generated by the receiving device. If the X46402 nonvolatile write cycle a “no ACK” (SDA=HIGH) response will be issued in response to loading of the command byte stop is issued prior to the start of a nonvolatile write cycle the write operation will be terminated and the part will reset and enter into a standby mode ...

Page 5

... X46402 Figure 2. Set V Level Sequence (V TRIP TRIP RESET SCL SDA D8h Figure 3. Set V2 Level Sequence (V TRIP V2 TRIP V2MON RESET SCL SDA D8h Figure 4. Reset V Level Sequence (Vcc > 3V, WEL is set.) TRIP V CC ...

Page 6

... However, in applications where the standard thresholds are not exactly right higher precision is needed in the threshold value, the X46402 trip points may be adjusted. The procedure is described below, and uses the application of a high volt- age control signal. ...

Page 7

... X46402 New Vcc or V2MON applied = Old Vcc V2MON applied V /V2 Programming TRIP TRIP Execute Reset V /V2 TRIP TRIP Sequence Set Vcc = Vcc applied = Desired V OR TRIP Set V2MON = V2MON applied = Desired V2 Vcc>=V2Trip TRIP, Execute Set Error TRIP, TRIP Sequence ...

Page 8

... Therefore, the X46402 will be considered a slave in all applications. Preliminary Information After each byte written to or read from the X46402, the address pointer is incremented by 1. This allows the user to read from the entire device after sending only a single address ...

Page 9

... During the ninth clock cycle the receiver will pull the SDA line LOW to acknowledge that it received the eight bits of data. The X46402 will respond with an acknowledge after rec- ognition of a start condition and its slave address. If both the device and a write condition have been selected, the X46402 will respond with an acknowledge after the receipt of each subsequent eight-bit word ...

Page 10

... X46402 PROGRAM OPERATIONS Password Protected Array Programming The password protected memory array write or OTP write requires issuing an 8-bit Password Write command followed by the password, password ACK command, the address and then the data bytes transferred as illustrated in Figure 10 bytes (or more) may be trans- ferred ...

Page 11

... This involves issuing the start condition followed by the new command code of 8 bits (1st byte of the protocol.) If the X46402 is still busy with the nonvolatile write opera- tion, it will issue a “no-ACK” in response. If the nonvolatile write operation has completed, an “ACK” will be returned and the host can then proceed with the rest of the proto- col ...

Page 12

... A new 8-bit address specifies the next byte to read. This process can continue indefinitely as long as the each byte read out of the X46402 is “NACKed” and followed by a repeated start. The address automatically increments after each read operation ...

Page 13

... X46402 No-Password Sequential Read The host can read sequentially within the un-protected area of the array after receiving the No-password Com- mand and an address within the unprotected address space. The data output is sequential, with the data from address n followed by the data from n+1. The address ...

Page 14

... X46402 Figure 15. Non-Password Protected Random Read No-Password COMMAND SDA S Figure 16. Non-Password Protected Sequential Read No-Password COMMAND SDA S Figure 17. Change Passwords COMMAND SDA S If ACK, then Password Matches ACK POLLING COMMAND S New Password 0 * ACK for correct password, No ACK for incorrect password Data 0 ...

Page 15

... X46402 Note on Read/Write Operations 1FFFh 0000h Notes: Using a “password read” “password write” non-password protected area is acceptable, because the pass- word is received and accepted prior to an address transmission assumed that access to non-password pro- tected areas is uncontrolled, so either method should work. ...

Page 16

... 0.1 – Preliminary Information Temp Min. 0°C –20°C Device Supply Voltage Limits X46402 2.5V to 3.7V Test Conditions = 1MHz, SCL w/ pull up resistor 2MON CC = 1MHz, SCL w/ pull up resistor 0. 0 1MHz 400 KHz ...

Page 17

... X46402 Table 4. CAPACITANCE (T = +25° 1MHz Symbol (3) Output Capacitance (SDA) C OUT (3) Input Capacitance (WP, SCL Notes: (1) Must perform a stop command after a read command prior to measurement (2) V min. and V IL (3) This parameter is periodically sampled and not 100% tested. EQUIVALENT A.C. LOAD CIRCUIT ...

Page 18

... X46402 RESET AC SPECIFICATIONS Nonvolatile Write Cycle Timing Symbol (1) Write Cycle Time t WC Notes the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used. ...

Page 19

... X46402 GUIDELINES FOR CALCULATING TYPICAL VALUES OF BUS PULL UP RESISTORS PMAX MIN Bus capacitance in pF POWER-UP AND POWER-DOWN TIMING RESET Output Timing V TRIP VCC 0 Volts t RV RESET V2FAIL Output Timing V2 TRIP V2MON Volts V2FAIL V CCMAX 0.4 R MIN = ---------------------------------------- ...

Page 20

... X46402 Symbol V RESET Trip Point Voltage TRIP V V2FAIL Trip Point Voltage 2TRIP V Hysteresis TRIP V TH (HIGH to LOW vs. LOW to HIGH V V Hysteresis 2TRIP V 2TA (HIGH to LOW vs. LOW to HIGH V t Power-up Reset Timeout PURST (5) Detect V Low Voltage to Reset Output (Vcc = 2.3V DVC (5) Detect V Low Voltage to Reset Output (Vcc = 2 ...

Page 21

... X46402 RESET Output Timing Symbol Watchdog Timeout Period, WD2 = 0, WD1 = 1, WD0 = 0 WD2 = 0, WD1 = 0, WD0 = 1 WD2 = 0, WD1 = 0, WD0 = 0 t WDO WD2 = 1, WD1 = 1, WD0 = 1 WD2 = 1, WD1 = 1, WD0 = 0 WD2 = 1, WD1 = 0, WD0 = 1 WD2 = 1, WD1 = 0, WD0 = 0 t SDA LOW duration (Reset the Watchdog) WDR t Reset Timeout ...

Page 22

... X46402 0 – 8 See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN P ARENTHESES IN MILLIMETERS) 8-LEAD PLASTIC, TSSOP , PACKAGE TYPE V .025 (.65) BSC .169 (4.3) .252 (6.4) BSC .177 (4.5) .114 (2.9) .122 (3.1) .047 (1.20) .0075 (.19) .002 (.05) .0118 (.30) .006 (.15) .019 (.50) .029 (.75) Detail A (20X) 22 Preliminary Information .010 (.25) Gage Plane Seating Plane ...

Page 23

... C 1.7 -20 to 85°C 2 70° C 2.3 -20 to 85°C 23 Preliminary Information Part Number 0°C–70°C X46402V8-3.1 -20°C–85°C X46402V8E-3.1 0°C–70°C X46402V8-3.1A -20°C–85°C X46402V8E-3.1A 0°C–70°C X46402V8-2.9 -20°C–85°C X46402V8E-2.9 ...

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