tc59lm913amg TOSHIBA Semiconductor CORPORATION, tc59lm913amg Datasheet - Page 9

• Manufacturer Part Number: tc59lm913amg
• Description: 512mbits Network Fcram1 Sstl_2 Interface ? 4,194,304-words ? 8 Banks ? 16-bits
• Manufacturer: TOSHIBA Semiconductor CORPORATION

AC CHARACTERISTICS AND OPERATING CONDITIONS
t
t
t
t
t
t
t
t
t
t
I
I
I
I
I
I
I
I
I
I
I
I
I
SYMBOL
LZ
HZ
QSLZ
QSHZ
QPDH
PDEX
T
FPDL
REFI
PAUSE
RC
RCD
RAS
RBD
RWD
WRD
RSC
PD
PDA
PDV
REFC
CKD
LOCK
Data-out Low Impedance Time from CLK
Data-out High Impedance Time from CLK
L/UDQS-out Low Impedance Time from CLK
L/UDQS-out High Impedance Time from CLK
Last output to PD High Hold Time
Power Down Exit Time
Input Transition Time
Auto-Refresh Average Interval
Pause Time after Power-up
Random Read/Write Cycle Time
(applicable to same bank)
RDA/WRA to LAL Command Input Delay
(applicable to same bank)
LAL to RDA/WRA Command Input Delay
(applicable to same bank)
Random Bank Access Delay
(applicable to other bank)
LAL following RDA to WRA Delay
(applicable to other bank)
LAL following WRA to RDA Delay
(applicable to other bank)
Mode Register Set Cycle Time
Power down mode valid from REF command
Auto-Refresh Cycle Time
REF Command to Clock Input Disable at Self-Refresh Entry
DLL Lock-on Time (applicable to RDA command)
PD Low Input Window for Self-Refresh Entry
PD Low to Inactive State of Input Buffer
PD High to Active State of Input Buffer
PARAMETER
B
B
L
L
= 2
= 4
−0.5 × t
−0.65
−0.65
−0.65
MIN
200
200
0.9
0.1
0.4



18
18
16
0
5
1
4
2
1
5
2
3
CK
(Notes: 1, 2) (continued)
TC59LM913AMG-50
MAX
0.65
0.65
3.9
















1
5
1
1
1
2005-11-08 9/46
UNIT
cycle
ns
µs
Rev 1.1
NOTES
3,6,8
3,7,8
3,6,8
3,7,8
3
3
5