tc59lm836dkg TOSHIBA Semiconductor CORPORATION, tc59lm836dkg Datasheet - Page 60
tc59lm836dkg
Manufacturer Part Number
tc59lm836dkg
Description
288mbits Network Fcram2 ? 2,097,152-words ? 4 Banks ? 36-bits
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TC59LM836DKG.pdf
(65 pages)
- Current page: 60 of 65
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TAP CONTROLLER STATE DIAGRAM
Notes:
1.
2.
TMS = 1
TMS = 0
To enter the Test-Logic-Reset state in order to initialize the device, keep TMS High for at least five rising edges of the TCK.
The TDO output buffer is active only during shift operations (the Shift-DR and Shift-IR states) and is inactive (High-Z) during
other states.
Test – Logic - Reset
Run – Test / Idle
TMS = 0
TMS = 1
TMS = 1
TMS = 0
TMS = 0
TMS = 1
Select – DR - Scan
Capture - DR
Update - DR
Pause - DR
Exit1 - DR
Exit2 - DR
Shift - DR
TMS = 0
TMS = 0
TMS = 1
TMS = 0
TMS = 1
TMS = 1
TMS = 0
TMS = 0
TMS = 1
TMS = 1
TMS = 1
TMS = 1
TMS = 0
TC59LM836DKG-33,-40
Select – IR - Scan
Capture - IR
Update - IR
Pause - IR
Exit1 - IR
Exit2 - IR
Shift - IR
TMS = 0
TMS = 0
TMS = 1
TMS = 0
TMS = 1
TMS = 1
2005-11-08 60/65
TMS = 0
TMS = 1
TMS = 1
TMS = 0
TMS = 0
Rev 1.4
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