ICS650-14B Integrated Circuit System, ICS650-14B Datasheet

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ICS650-14B

Manufacturer Part Number
ICS650-14B
Description
Networkingclock Source
Manufacturer
Integrated Circuit System
Datasheet
MDS 650-14B B
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800te l • www.icst.com
Description
The ICS650-14B is a low cost, low jitter, high
performance clock synthesizer customized for
networking systems applications. Using analog Phase-
Locked Loop (PLL) techniques, the device accepts a
25.0 MHz clock or fundamental mode crystal input to
produce multiple output clocks of one fixed 25.0 MHz,
a four (plus one) frequency selectable bank, and two
frequency selectable clocks. All output clocks are
frequency locked together. The ICS650R-14B
outputs all have 0 ppm synthesis error.
Block Diagram
25.00 MHz
crystal or clock
Optional crystal capacitors are shown and may be required for tuning of initial accuracy (determined once per
board).
SELA 0:1
SELB 0:1
SELC
X2
X1/ICLK
2
2
Oscillator
Buffer/
Crystal
Clock
and Control Circuitry
Clock Synthesis
VDD
GND
2
2
1
Features
• Packaged in 20 pin (150 mil) SSOP (QSOP)
• 25.00 MHz fundamental crystal or clock input
• One fixed output clock of one 25.0 MHz
• One bank of four frequency selectable
• Three frequency selectable clock outputs
• Zero ppm synthesis error in all clocks
• Ideal for networking systems
• Full CMOS output swing
• Advanced, low power, sub-micron CMOS process
• 3.0V to 5.5V operating voltage
• Industrial temperature range available
output clocks
Networking System Clock
Output
Output
Output
Output
Buffer
Buffer
Buffer
Output
Buffer
Buffer
OE (All outputs)
4
CLKA 1:4
CLKA5
CLKB
CLKC
25.00 MHz
ICS650-14B
Revision 072401

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ICS650-14B Summary of contents

Page 1

... Description The ICS650-14B is a low cost, low jitter, high performance clock synthesizer customized for networking systems applications. Using analog Phase- Locked Loop (PLL) techniques, the device accepts a 25.0 MHz clock or fundamental mode crystal input to produce multiple output clocks of one fixed 25.0 MHz, a four (plus one) frequency selectable bank, and two frequency selectable clocks ...

Page 2

... Select pin for CLKA1:4 and CLKA5 outputs. See Table 1. Connect to +3.3V or +5.0V. Must be same as other VDDs. Selectable clock output. See Table 1. Selectable clock output. See Table 1. Select pin for CLKA1:4 and CLKA5 outputs. See Table 1. Select pin for CLKC output. See Table 3. 2 ICS650-14B Networking System Clock CLKA1:4 CLKA5 33.33 66. ...

Page 3

... IOH=-12mA 2.4 IOL=12mA IOH=-8mA VDD-0.4 No Load, VDD = 3.3V Each output 0.8 to 2.0V 2.0 to 0.8V At VDD/2 45 All clocks CLKB = 27M CLKC = 6.25M Other Clocks may be used for each clock output. The 25.00 MHz 3 ICS650-14B Typical Units Maximum 7 V VDD+0 °C 85 °C 260 °C 150 °C 5.5 ...

Page 4

... INDEX AREA Ordering Information for ICS650-14B Part/Order Number ICS650R-14 ICS650R-14T ICS650R-14I ICS650R-14IT While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Inc (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied ...

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